Total 7 Mechanical Engineer job vacancies in Art / Design / Entertainment category in Malaysia

**Please Note** This position is posted in anticipation of future work and does not represent a currently funded opening. Your application will be reviewed with respect to the expected work upcoming. Your patience is appreciated.

The Leidos Health Group is seeking a highly skilled Cloud Architect to support an Army National Guard government customer regarding the creation of Cloud strategies, evaluating Cloud applications and hardware, developing and organizing Cloud systems, monitoring Cloud privacy, addressing technical issues, and assisting the government customer with Cloud adoption.  This position offers an exciting opportunity to lead the development and implementation of innovative Cloud solutions that support government customer business objectives.

The Cloud Architect will be proficient and well versed in designing and implementing Cloud solutions, with the experience and ability to assist the government customer with managing and maintaining the organization’s Cloud architecture.  This may include responsibility for building and overseeing the Cloud system(s), including servers, storage, and network infrastructure.

The ideal candidate will have leadership experience ensuring that online capabilities align with government customer requirements.  They will collaborate closely with diverse IT teams to build, maintain, and/or enhance the Cloud infrastructure and optimize its performance.

The position is primarily remote, with the candidate physically located in the National Capital Region (Virginia, District of Columbia, or Maryland).  Some local travel to attend customer meetings at the Government customer site in Arlington, Virginia, is required (estimated 25-30%). Candidates who reside outside of Virginia, Washington DC, or Maryland will not be considered.

Primary Responsibilities

• Involvement in and/or oversight for team planning, configuring, migration and enhancement of an Army system in a government-selected Cloud hosting facility. 

• Develop and execute a government-approved plan and schedule to move the Army system to a Cloud environment selected by the government, if indicated.

• Work with government entities to complete Information Assurance plans and packages following the RMF Framework.

• Implement application security as it pertains to the Army system (MEDCHART) and maintain a valid authorization decision.

• Facilitate data and code movement from an existing facility to a target facility, if indicated.

• Create an inventory of programs and tools to catalog all data in the existing facility and, if indicated, use of the same tools post-migration to confirm data completeness in a target facility.

• Conduct full regression testing to confirm that all functionality is operational.

• Assist with modernization efforts of current Army system as it relates to the Cloud environment.

• Make changes to the Army system infrastructure to reduce sustainment costs and improve end-user customer experience and overall performance.

• Provide detailed Level of Effort reports for meeting the Government’s requirements.

Basic Qualifications

• Bachelor's degree with 12 or more years relevant experience or Master's degree and 10 or more years relevant experience. Degree should be in a relevant field.

• Proven work experience as a Cloud Architect/Cloud Engineer

• Knowledge of Cloud computing technologies and current computing trends

• Experience creating Cloud strategies, evaluating Cloud applications, and developing and maintaining Cloud systems.

• Experience moving systems to a Cloud environment and the subject matter expertise required with such an effort, including modernization efforts.

• Experience with identifying and/or assisting with the selection of Cloud hosting facilities.

• Experience implementing application security to maintain a valid authorization decision; experience with Information Assurance plans and packages.

• Ability to interact and communicate effectively (written and verbal) to properly articulate complicated Cloud information, reports, etc., to leadership, the government customer, and other IT partners.

• The ability to obtain a Public Trust ADP/IT2 level with the additional ability to obtain and maintain a Secret Security Clearance, if later required. Preference may be given to those already holding clearance.

• Due to government contract, U.S. Citizenship required

Preferred Qualifications

• Training and/or certifications as a Cloud Architect/Cloud Engineer                      

• Previous or current DoD, DHA, MHS, and/or Army, Army National Guard, Army Reserve experience in relation to the job requirements

• Previous or current MEDCHART experience in relation to the job requirements

• Preferred knowledge and experience with the .NET framework/C#; SQL Server

• Preferred knowledge and experience with AWS and/or AZURE platform

Original Posting Date:

2024-03-15

While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above.

Pay Range:

Pay Range $122,200.00 - $220,900.00

The Leidos pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.

Job Description:

The Digital Modernization Sector at Leidos is seeking has an opening for an Architecture Engineer (CAN/LAN) to support global enterprise networks.  Network Architecture provides solutions for modernizing the network components while supporting service delivery requirements in a focused operational enterprise. 

                           

Primary Responsibilities:

• Support requirement gathering and apply standard design approaches for service delivery. Fully document designs with diagrams, bill of materials, cabling sheets, configurations, and other supporting documents.
• Use our private test lab to evaluate new technologies and capabilities, test proposed changes to production networks, and recreate troubleshooting scenarios to support the production enterprise network.
• Schedule maintenance windows for migrating user connections from legacy to the modern infrastructure transition services with little to no impact on critical data flows.
• Develop secure network designs including configurations that align with Defense Information Systems Agency (DISA) Security Technical Implementation Guides (STIGs) and enterprise policies. Obtain Authority to Operate (ATO) for new devices, software, and capabilities.
• Provide feedback to improve design products, processes, and systems for our team to work efficiently and effectively.
• Although this position focuses on CAN/LAN, this opportunity offers the ability to learn and work on Multiprotocol Label Switching (MPLS) Wide Area Networks (WANs).

Basic Qualifications

• Candidate must have 10 years of experience that can be a combination of work history and education. This equates to a Doctorate and 8 years of experience OR Masters and 4 years, Bachelors and 6 years, Associates and 8 years or HS and 10 years. 
• Active TS/SCI with Polygraph
• Security+ Certification
• Compliance with DoD 8570 Information Assurance Technical (IAT) Level 2 (Security+ CE)
•  Experience specific to Network Engineering to include network operations and/or network design and implementation
•  Prior responsibility for production network hardware configurations for Cisco, Brocade, and/or Juniper
• Hands-on experience implementing and troubleshooting standard routing protocols in a production network, such as Open Shortest Path First (OSPF) or Enhanced Interior Gateway Routing Protocol (EIGRP)

Desired Qualifications:

• Network engineering and design experience specific to CAN/LAN. Experience should include application of industry standards, developing configurations, and integration of solutions into production environments.
• Network engineering and design experience with MPLS WANs, network management tools, and firewalls
• Detailed knowledge of routing and switching protocols and the ability to demonstrate knowledge. Cisco Certified Network Associate (CCNA) or equivalent knowledge.
• Ability to obtain a Cisco Certified Network Associate (CCNA) certification within one year from the date of hire.
• Initiative and disciplined to work as part of a network engineering team

Original Posting Date:

2024-03-13

While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above.

Pay Range:

Pay Range $68,900.00 - $124,550.00

The Leidos pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.

Job Description:

The Digital Modernization Sector at Leidos is seeking has an opening for an Architecture Engineer (CAN/LAN) to support global enterprise networks.  Network Architecture provides solutions for modernizing the network components while supporting service delivery requirements in a focused operational enterprise. 

                           

Primary Responsibilities:

• Support requirement gathering and apply standard design approaches for service delivery. Fully document designs with diagrams, bill of materials, cabling sheets, configurations, and other supporting documents.
• Use our private test lab to evaluate new technologies and capabilities, test proposed changes to production networks, and recreate troubleshooting scenarios to support the production enterprise network.
• Schedule maintenance windows for migrating user connections from legacy to the modern infrastructure transition services with little to no impact on critical data flows.
• Develop secure network designs including configurations that align with Defense Information Systems Agency (DISA) Security Technical Implementation Guides (STIGs) and enterprise policies. Obtain Authority to Operate (ATO) for new devices, software, and capabilities.
• Provide feedback to improve design products, processes, and systems for our team to work efficiently and effectively.
• Although this position focuses on CAN/LAN, this opportunity offers the ability to learn and work on Multiprotocol Label Switching (MPLS) Wide Area Networks (WANs).

Basic Qualifications

• Candidate must have 10 years of experience that can be a combination of work history and education. This equates to a Doctorate and 8 years of experience OR Masters and 4 years, Bachelors and 6 years, Associates and 8 years or HS and 10 years. 
• Active TS/SCI with Polygraph
• Security+ Certification
• Compliance with DoD 8570 Information Assurance Technical (IAT) Level 2 (Security+ CE)
•  Experience specific to Network Engineering to include network operations and/or network design and implementation
•  Prior responsibility for production network hardware configurations for Cisco, Brocade, and/or Juniper
• Hands-on experience implementing and troubleshooting standard routing protocols in a production network, such as Open Shortest Path First (OSPF) or Enhanced Interior Gateway Routing Protocol (EIGRP)

Desired Qualifications:

• Network engineering and design experience specific to CAN/LAN. Experience should include application of industry standards, developing configurations, and integration of solutions into production environments.
• Network engineering and design experience with MPLS WANs, network management tools, and firewalls
• Detailed knowledge of routing and switching protocols and the ability to demonstrate knowledge. Cisco Certified Network Associate (CCNA) or equivalent knowledge.
• Ability to obtain a Cisco Certified Network Associate (CCNA) certification within one year from the date of hire.
• Initiative and disciplined to work as part of a network engineering team

Original Posting Date:

2024-03-13

While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above.

Pay Range:

Pay Range $68,900.00 - $124,550.00

The Leidos pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.

The EW Division of Leidos is looking for a FPGA DSP Firmware Design Engineer to work with a multi-disciplined design team (electrical engineers, systems engineers, scientists, etc) to design, develop, simulate, and integrate challenging DSP FPGA designs and RF sensor systems based on given project requirements.  Candidate will have a strong background in Digital Signal Processing (DSP) algorithms and their implementation in MATLAB and FPGAs in support of a fast paced, multi-disciplinary design team. This role will also support integration, test, and verification in the final products.

Primary Responsibilities

• Analyze, design, simulate, and implement algorithms in hardware descriptor languages, HDL (VHDL, Verilog), based on customer requirements and/or MATLAB model(s).

• Collaborate with a multi-disciplined design team (electrical engineers, systems engineers and scientists) to design and integrate challenging DSP FPGA designs and RF sensor systems.

• Collaborate with a multi-disciplined design team to design and integrate DSP applications for latest System on a Chip (SoC) implementations such as Xilinx Zynq Ultrascale+, Intel Stratix-10, and Xilinx RFSoC.

• Analyze, design, and implement HDL test benches in hardware description languages, HDL (VHDL, Verilog), for code validation and validation against models.

• Perform design constraints generation and verification as well as evaluate synthesis and timing performance reports.

• Implement and validate signal processing concepts such as FFTs, channelizers, digital filters, digital modulation, digital down/up-conversion, adaptive processing, etc. into either new or existing modular HDL designs.

• Analyze, design, simulate, and implement designs which interface to common signaling standards, typical IP hard macros such as SERDES, PLLS, etc. and/or protocols such PCIe, JESD204B, LVDS, etc.

• Analyze schematic diagrams for either custom or commercial-off-the shelf (COTS) electronic hardware involving high-speed digital and/or analog circuitry in associated FPGA-centric systems.

• Develop and maintain requirements documents, functional specification documents, interface control documents, etc.

• Generate and maintain engineering drawings and configuration management policies for FPGA project hierarchy.

• Develop project test plans and test procedures, provide test planning support, and assist in the execution of both lab testing and field testing.

• Provide occasional technical support and/or field support planning, and other field support in general if needed.

• Conduct experimental tests on latest FPGA and SoC evaluation boards, evaluate results, and then develop specifications for selecting next-generation components for deliverable systems.

• Work on problems of diverse scope, determining methods and procedures to be used on new assignments, and providing feedback and recommendations to other technical personnel.

• Interact with outside customers, suppliers, and functional peer groups.

• Some travel and work at remote sites for limited time periods may be occasionally required.

• Provide status reports to project managers and/or division production manager as required.

Basic Qualifications

• Must have a current Secret clearance with the ability to obtain a TS/SCI level clearance.

• Experience with at least one FPGA Integrated Design Environment tool set such as Xilinx Vivado and Mentor Graphics ModelSim.

• Experience in signal processing theory and communications systems and the ability to apply theoretical knowledge in resolving real world problems

• Experience with MATLAB signal processing environment

• BS in Electrical Engineering or Computer Engineering or related degree

• Minimum of 4 years of relevant experience

Preferred Qualifications

• MS in Electrical Engineering or Computer Engineering or related

• Experience writing test software in C/C++ or assembly language to validate design

• 5 to 8 years of relevant experience

• Experience with hardware integration, test and debug tools (high-speed logic analyzers, scopes, spectrum analyzers, etc.)

• Familiarity with Electronic Warfare applications

• Experience with high-speed (> GHz) design techniques

• ARM or RISC-V embedded processor based SoC design experience

• Experience with performance characteristics of analog data converters, ADCs/DACs.

• Familiarity with JESD204B

• Existing Top Secret Clearance

LInC

Electronic Warfare

Original Posting Date:

2024-02-08

While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above.

Pay Range:

Pay Range $81,250.00 - $146,875.00

The Leidos pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.

The Electronic Warfare (EW) Division of Leidos is looking for a FPGA DSP Firmware Engineer to lead a design team to design, develop, simulate, and integrate challenging DSP FPGA designs and RF sensor systems based on given program requirements.  The successful candidate will have a strong background in technical team leadership for firmware design, the ability to implement MATLAB algorithms in the FPGA and incorporate client feedback into firmware revisions.

Primary Responsibilities

• Lead a firmware design team to design, integrate and test challenging DSP FPGA designs for EW sensor systems.

• Evaluate a project’s firmware needs, designing a firmware solution to meet project needs and be able to communicate that design to the program leadership.

• Develop and implement new firmware, debug firmware to ensure it functions properly, evaluate performance and troubleshoot as needed.

• Incorporate client feedback into firmware revisions, manage budgetary and time constraints.

• Keep the firmware team up-to-date on technological developments and industry best practices.

• Lead the design and development of innovative reconfigurable Software-Defined Radio (SDR) architectures, Sensor Systems, Data Acquisition, from Air/Space to Ground deployments for government agencies

• Analyze schematic diagrams for high-speed digital and/or analog circuitry in associated FPGA-centric systems.

• Develop and maintain requirements documents, engineering drawings and configuration management policies for FPGA project hierarchy.

• Develop project test plans and test procedures, provide test planning support, and assist in the execution of both lab testing and field testing.

• Conduct experimental tests on latest FPGA and SoC evaluation boards, evaluate results, and then develop specifications for selecting next-generation components for deliverable systems.

• Some travel and work at remote sites for limited time periods may be occasionally required.

• Provide status reports to project managers and/or division production manager as required.

Basic Qualifications:

• Active US government Top Secret clearance.  

• Ability to work full time at facility site in Arlington, VA

• Experience with FPGA Integrated Design Environment tool sets such as Xilinx Vivado and Mentor Graphics ModelSim.

• Experience with latest System on a Chip (SoC) implementations such as Xilinx Zynq Ultrascale+, Intel Stratix-10, and Xilinx RFSoC.

• Proficiency in hardware descriptor languages, HDL (VHDL, Verilog) and/or MATLAB model(s).

• Ability to perform design constraints generation and verification as well as evaluate synthesis and timing performance reports.

• Hands on design and test experience with signal processing concepts such as FFTs, channelizers, digital filters, digital modulation, digital down/up-conversion, adaptive processing, etc and their implementation into new or existing modular HDL designs.

• Familiarity with common signaling standards, typical IP hard macros such as SERDES, PLLS, etc. and/or protocols such PCIe, JESD204B, LVDS, etc.

• Proficiency with hardware integration, test and debug tools (high-speed logic analyzers, scopes, spectrum analyzers, etc.)

• Bachelors in Electrical Engineering or Computer Engineering or similar field

• Minimum of 12 years of relevant experience with at least 2 years in a technical leadership position

Preferred Qualifications:

• Experience writing test software in C/C++ or assembly language to validate design

• Experience with high-speed (> 20GHz) design techniques

• ARM or RISC-V embedded processor based SoC design experience

• Proven experience in the military/aerospace hi reliability electronic warfare product development, especially in the area of radiation hardened, space grade FPGA circuit card design,

• Subject matter expert in high-speed digital hardware, embedded firmware & software, and miniaturized high-performance systems for EW applications.

• Expertise in optimum thermal management for FPGA circuit card design for high altitude conduction cooled applications

• Ability to obtain TS/SCI clearance

LInC

Electronic Warfare

Pay Range:

Pay Range $122,200.00 - $220,900.00

The Leidos pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.

Leidos has an exciting opportunity for a HRIS Solution Architect/Chief Engineer to join a high performing Agile team in designing and deploying Workday at Veterans Affairs. Working as part of a dynamic team, the Solution Architect’s role will be to ensure Workday is configured in line with the customer’s needs and requirements to enable a great user experience for all users. This role will plan, design, set-up, implement, and work with others on system design, configuration and ongoing support.

This position requires the ability to obtain a National Agency Clearance and Inquiries (NACI) clearance.

**Contingent upon Award**

Primary Responsibilities

• Support the definition, configuration, development and delivery of a successful Workday HR solution.
• Lead the creation of solution architecture documentation including future state process, configuration dictionaries, etc.
• Build an in-depth understanding of the customer’s current and future business needs and the relationship of interdependent project work streams.
• Develop and maintain the necessary plans for solutioning workshops, business process definition, configuration, testing and training support - including key tasks, milestones, and deliverables – aligned with delivering the overall solution.
• Assist with the definition of system processes and standards.
• Facilitate conversations with the customer to gather and provide recommendations on target business requirements in line with the Workday capabilities and the functional roadmap.
• Map stated customer requirements to standard Workday business processes, forming the basis of subsequent process-based discussions.
• Develop plans for Workday configuration for requirements that cannot be accommodated by standard, out-of-the-box functionality.
• Work with the Technical Lead and the Integration Lead to drive execution of planned activities to ensure solutioning is delivered on-time and in line with interdependent project workstreams.
• Provide the information and documentation needed for change orders.
• Support the project issue and risk identification, troubleshooting, decision-making, mitigation, and escalation processes to ensure quick and effective problem resolution.
• Support the transfer of relevant Workday product knowledge to target customer resources.
• Participate in the VA’s authorization and approval process (ATO, ATC, MOU, & etc.) for solutions and services.
• Provide support for the maintenance of system interfaces.

Basic Qualifications

• BA/BS in Information Technology, Systems Engineering, or other related field and 12+ years of prior relevant experience or Masters with 10+ years or prior relevant experience.
• 7+ years of experience supervising or leading teams or projects.
• 5+ years of experience in solution architecture and data architecture, working with highly scalable systems.
• 2+ years of experience configuring Workday implementations, including the integration with strong knowledge of Agile development processes.
• Prior experience leading system engineering and/or solution architecture efforts at Veterans Affairs.
• Hands-on experience deploying cloud-based SaaS solutions (Azure and AWS)
• Ability to identify risks and propose mitigation strategies.
• Proficiency with solution diagramming and modeling, process modeling, data modeling using various modeling tools.
• Experience documenting solution architectures using standard templates, and summarizing the architectures for non-technical users in PowerPoint and MS Word documents.
• Experience with DODAF Framework.
• Ability to communicate complex technical information in a condensed manner to various stakeholders verbally and in writing.
• Adaptability and a willingness to learn new skills, technologies, and frameworks
• Strong communication skills.
• Certifications: CSM, Scaled Agile Framework certification (SAFe Agilist or other), cloud certifications, Workday certifications (HCM).

Pay Range:

Pay Range $122,200.00 - $220,900.00

The Leidos pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.

The EW Division of Leidos is looking for a FPGA DSP Firmware Design Engineer to work with a multi-disciplined design team (electrical engineers, systems engineers, scientists, etc) to design, develop, simulate, and integrate challenging DSP FPGA designs and RF sensor systems based on given project requirements.  Candidate will have a strong background in Digital Signal Processing (DSP) algorithms and their implementation in MATLAB and FPGAs in support of a fast paced, multi-disciplinary design team. This role will also support integration, test, and verification in the final products.

Primary Responsibilities

• Analyze, design, simulate, and implement algorithms in hardware descriptor languages, HDL (VHDL, Verilog), based on customer requirements and/or MATLAB model(s).

• Collaborate with a multi-disciplined design team (electrical engineers, systems engineers and scientists) to design and integrate challenging DSP FPGA designs and RF sensor systems.

• Collaborate with a multi-disciplined design team to design and integrate DSP applications for latest System on a Chip (SoC) implementations such as Xilinx Zynq Ultrascale+, Intel Stratix-10, and Xilinx RFSoC.

• Analyze, design, and implement HDL test benches in hardware description languages, HDL (VHDL, Verilog), for code validation and validation against models.

• Perform design constraints generation and verification as well as evaluate synthesis and timing performance reports.

• Implement and validate signal processing concepts such as FFTs, channelizers, digital filters, digital modulation, digital down/up-conversion, adaptive processing, etc. into either new or existing modular HDL designs.

• Analyze, design, simulate, and implement designs which interface to common signaling standards, typical IP hard macros such as SERDES, PLLS, etc. and/or protocols such PCIe, JESD204B, LVDS, etc.

• Analyze schematic diagrams for either custom or commercial-off-the shelf (COTS) electronic hardware involving high-speed digital and/or analog circuitry in associated FPGA-centric systems.

• Develop and maintain requirements documents, functional specification documents, interface control documents, etc.

• Generate and maintain engineering drawings and configuration management policies for FPGA project hierarchy.

• Develop project test plans and test procedures, provide test planning support, and assist in the execution of both lab testing and field testing.

• Provide occasional technical support and/or field support planning, and other field support in general if needed.

• Conduct experimental tests on latest FPGA and SoC evaluation boards, evaluate results, and then develop specifications for selecting next-generation components for deliverable systems.

• Work on problems of diverse scope, determining methods and procedures to be used on new assignments, and providing feedback and recommendations to other technical personnel.

• Interact with outside customers, suppliers, and functional peer groups.

• Some travel and work at remote sites for limited time periods may be occasionally required.

• Provide status reports to project managers and/or division production manager as required.

Basic Qualifications

• Must have a current Secret clearance with the ability to obtain a TS/SCI level clearance.

• Experience with at least one FPGA Integrated Design Environment tool set such as Xilinx Vivado and Mentor Graphics ModelSim.

• Experience in signal processing theory and communications systems and the ability to apply theoretical knowledge in resolving real world problems

• Experience with MATLAB signal processing environment

• BS in Electrical Engineering or Computer Engineering or related degree

• Minimum of 4 years of relevant experience

Preferred Qualifications

• MS in Electrical Engineering or Computer Engineering or related

• Experience writing test software in C/C++ or assembly language to validate design

• 5 to 8 years of relevant experience

• Experience with hardware integration, test and debug tools (high-speed logic analyzers, scopes, spectrum analyzers, etc.)

• Familiarity with Electronic Warfare applications

• Experience with high-speed (> GHz) design techniques

• ARM or RISC-V embedded processor based SoC design experience

• Experience with performance characteristics of analog data converters, ADCs/DACs.

• Familiarity with JESD204B

• Existing Top Secret Clearance

LInC

Electronic Warfare

Pay Range:

Pay Range $81,250.00 - $146,875.00

The Leidos pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.