Total 24 Senior Executive Design Intern job vacancies in The United States of America

Key Responsibilities:

• Development of Analog/Mixed-Signal circuits from specifications to prototypes.
• System-level analysis and evaluation, full-chip architecture design, analysis, modeling, simulation, and integration.
• Schematic entry, corner simulation, layout consideration, and post-layout simulation.
• Work closely with the layout engineer to conduct the physical implementation (layout) and chip floor planning.
• Responsible for post-layout extraction and parasitic analysis.
• Able to work with other designers, Chip Architects, and layout engineers to achieve full-chip integration, place and route, top-level verification, and tape out.

Requirements:

• Ph.D./Master/Degree in Electrical Engineering or Microelectronics with excellent technical background in Analog /Mixed-Signal IC design
• Min. 3 years of experience in CMOS Analog IC design and simulation
• Good design experience in Analog IC design involving two or more of the following blocks: low noise pre-amplifier (low offset, high CMRR, high PSRR and bandwidth up to 600MHz), CMOS Gigahertz Oscillator, switched capacitor circuit, LDO, Differential Amplifier, comparator, Opamp, TIA, and Bandgap Reference and high-frequency full-wave rectifier, etc.
• Good design knowledge in ESD and Latch-Up.
• Experience in isolator devices (capacitive-coupler or optical-coupler) and photodetector-associated circuits will be an added advantage.
• Experience with sigma-delta modulators and IO drivers will be an added advantage.
• Good working knowledge of relevant analog IC design and simulation tools (Spice or its equivalent)
• Basic understanding and can develop simple design-related scripts with some common script languages, such as perl, Tcl, matlab or cadence skill etc.
• A team player with good communication skills.
• Able to work independently, flexibly, and creatively.

Key Responsibilities:

• Development of Analog/Mixed-Signal circuits from specifications to prototypes.
• System-Level analysis and evaluation, full-chip architecture design, analysis, modeling, simulation, and integration.
• Schematic entry, corner simulation, layout consideration, and post-layout simulation.
• Work closely with the layout engineer to conduct the physical implementation (layout) and chip floor planning.
• Responsible for post-layout extraction and parasitic analysis.
• Able to work with other designers, Chip Architects, and layout engineers to achieve full-chip integration, place and route, top-level verification, and tape out.

Requirements:

• Ph.D./Master/Degree in Electrical Engineering or Microelectronics with excellent technical background in Analog /Mixed-Signal IC design
• Min. 5 years of experience in CMOS Analog IC design and simulation
• Good design experience in Analog IC design involving two or more of the following blocks: low noise pre-amplifier (low offset, high CMRR, high PSRR and bandwidth up to 600MHz), CMOS Gigahertz Oscillator, switched capacitor circuit, LDO, Differential Amplifier, comparator, Opamp, TIA, and Bandgap Reference and high-frequency full-wave rectifier, etc.
• Good design knowledge in ESD and Latch-Up.
• Experience in isolator devices (capacitive-coupler or optical-coupler), Photodetector-associated circuits will be an added advantage.
• Experience with sigma-delta modulators and IO drivers will be an added advantage.
• Good working knowledge of relevant analog IC design and simulation tools (Spice or its equivalent)
• Basic understanding and can develop simple design-related scripts with some common script languages, such as perl, Tcl, matlab or cadence skill etc.
• A team player with good communication skills.
• Able to work independently, flexibly, and creatively.

Key Responsibilities:

• Working on ASIC digital design, including RTL coding based on Verilog, simulation, RTL and gate-level verification, code coverage, testbench development, logic synthesis, and design documentation.

Key Requirements:

• Master/Degree in Electrical Engineering with 5 years of ASIC design experience preferred.
• Familiar with ASIC design flow
• Experience in RTL coding based on Verilog. Familiar with the digital simulation debugging environment.
• Familiar with UNIX/Linux environment and scripting
• A team player with good communication skills
• Able to work independently, flexibly, and creatively.
• Strong analytical and problem solving

Key Responsibilities:

• Working on ASIC digital design, including RTL coding based on Verilog, simulation, RTL and gate-level verification, code coverage, testbench development, logic synthesis, and design documentation.

Key Requirements:

• Master/Degree in Electrical Engineering with 3 years of ASIC design.
• experience preferred.
• Familiar with ASIC design flow.
• Experience in RTL coding based on Verilog. Familiar with the digital simulation debugging environment.
• Familiar with UNIX/Linux environment and scripting.
• A team player with good communication skills.
• Able to work independently, flexibly, and creatively.
• Strong analytical and problem solving.

Key Responsibilities:

• The design verification engineer is expected to check, test, and gate the product design for both performance and reliability.
• Draft a test plan to cover each feature in product spec, certification requirement, and customer application.
• Support on DFMEA documentation draft and maintenance.
• Test products' electrical & mechanical performance and reliability with lab equipment such as multi-meter, integrating sphere, oscilloscope, and environmental chamber.
• Testing equipment management & maintenance.
• Follow up on the quality issues found and verify the effectiveness of corrective action.
• Give quality input during the early design stage to avoid potential quality issues.
• Update & deliver the test reports to the project lead and define the quality level of R&D stages.
• Work with QA to ensure the design quality can be delivered to the next phase.

Requirements:

• Bachelor’s in Electronic Engineering, computer science, or relevant majors.
• At least 5 years of design, testing, or quality experience.
• Experience in power electronics product testing and understanding of electronic product schematics is required.
• Operation experience with basic electronic equipment like oscilloscope, multimeter, power supply, and load are required.
• Knowledge or experience in electronic design, design quality, MCU, FW testing & appliances is preferred.
• Able to travel overseas.
• Familiar with UL standards will be an added advantage.
• Proficient in English and chinese to liase with HQ counterparts.

Key Responsibilities:

• The design verification engineer is expected to check, test, and gate the product design for both performance and reliability.
• Draft a test plan to cover each feature in product spec, certification requirement, and customer application.
• Support on DFMEA documentation draft and maintenance.
• Test products' electrical & mechanical performance and reliability with lab equipment such as multi-meter, integrating sphere, oscilloscope, and environmental chamber.
• Testing equipment management & maintenance.
• Follow up on the quality issues found and verify the effectiveness of corrective action.
• Give quality input during the early design stage to avoid potential quality issues.
• Update & deliver the test reports to the project lead and define the quality level of R&D stages.
• Work with QA to ensure the design quality can be delivered to the next phase.

Requirements:

• Bachelor’s in Electronic Engineering, computer science, or relevant majors.
• At least 3 years of design, testing, or quality experience.
• Experience in power electronics product testing and understanding of electronic product schematics is required.
• Operation experience with basic electronic equipment like oscilloscope, multimeter, power supply, and load are required.
• Knowledge or experience in electronic design, design quality, MCU, FW testing & appliances is preferred.
• Able to travel overseas.
• Familiar with UL standards will be an added advantage.
• Proficient in English and chinese to liase with HQ counterparts.

Key Responsibilities:

• The design verification engineer is expected to check, test, and gate the product design for both performance and reliability.
• Draft a test plan to cover each feature in product spec, certification requirement, and customer application.
• Support on DFMEA documentation draft and maintenance.
• Test products' electrical & mechanical performance and reliability with lab equipment such as multi-meter, integrating sphere, oscilloscope, and environmental chamber.
• Testing equipment management & maintenance.
• Follow up on the quality issues found and verify the effectiveness of corrective action.
• Give quality input during the early design stage to avoid potential quality issues.
• Update & deliver the test reports to the project lead and define the quality level of R&D stages.
• Work with QA to ensure the design quality can be delivered to the next phase.

Requirements:

• Bachelor’s in Electronic Engineering, computer science, or relevant majors.
• At least 3 years of design, testing, or quality experience.
• Experience in power electronics product testing and understanding of electronic product schematics is required.
• Operation experience with basic electronic equipment like oscilloscope, multimeter, power supply, and load are required.
• Knowledge or experience in electronic design, design quality, MCU, FW testing & appliances is preferred.
• Able to travel overseas.
• Familiar with UL standards will be an added advantage.
• Proficient in English and chinese to liase with HQ counterparts.

Key Responsibilities:

• Development of Analog/Mixed-Signal circuits from specifications to prototypes.
• System-level analysis and evaluation, full-chip architecture design, analysis, modeling, simulation, and integration.
• Schematic entry, corner simulation, layout consideration, and post-layout simulation.
• Work closely with the layout engineer to conduct the physical implementation (layout) and chip floor planning.
• Responsible for post-layout extraction and parasitic analysis.
• Able to work with other designers, Chip Architects, and layout engineers to achieve full-chip integration, place and route, top-level verification, and tape out.

Requirements:

• Ph.D./Master/Degree in Electrical Engineering or Microelectronics with excellent technical background in Analog /Mixed-Signal IC design
• Min. 3 years of experience in CMOS Analog IC design and simulation
• Good design experience in Analog IC design involving two or more of the following blocks: low noise pre-amplifier (low offset, high CMRR, high PSRR and bandwidth up to 600MHz), CMOS Gigahertz Oscillator, switched capacitor circuit, LDO, Differential Amplifier, comparator, Opamp, TIA, and Bandgap Reference and high-frequency full-wave rectifier, etc.
• Good design knowledge in ESD and Latch-Up.
• Experience in isolator devices (capacitive-coupler or optical-coupler) and photodetector-associated circuits will be an added advantage.
• Experience with sigma-delta modulators and IO drivers will be an added advantage.
• Good working knowledge of relevant analog IC design and simulation tools (Spice or its equivalent)
• Basic understanding and can develop simple design-related scripts with some common script languages, such as perl, Tcl, matlab or cadence skill etc.
• A team player with good communication skills.
• Able to work independently, flexibly, and creatively.

Key Responsibilities:

• The design verification engineer is expected to check, test, and gate the product design for both performance and reliability.
• Draft a test plan to cover each feature in product spec, certification requirement, and customer application.
• Support on DFMEA documentation draft and maintenance.
• Test products' electrical & mechanical performance and reliability with lab equipment such as multi-meter, integrating sphere, oscilloscope, and environmental chamber.
• Testing equipment management & maintenance.
• Follow up on the quality issues found and verify the effectiveness of corrective action.
• Give quality input during the early design stage to avoid potential quality issues.
• Update & deliver the test reports to the project lead and define the quality level of R&D stages.
• Work with QA to ensure the design quality can be delivered to the next phase.

Requirements:

• Bachelor’s in Electronic Engineering, computer science, or relevant majors.
• At least 5 years of design, testing, or quality experience.
• Experience in power electronics product testing and understanding of electronic product schematics is required.
• Operation experience with basic electronic equipment like oscilloscope, multimeter, power supply, and load are required.
• Knowledge or experience in electronic design, design quality, MCU, FW testing & appliances is preferred.
• Able to travel overseas.
• Familiar with UL standards will be an added advantage.
• Proficient in English and chinese to liase with HQ counterparts.

Key Responsibilities:

• Development of Analog/Mixed-Signal circuits from specifications to prototypes.
• System-Level analysis and evaluation, full-chip architecture design, analysis, modeling, simulation, and integration.
• Schematic entry, corner simulation, layout consideration, and post-layout simulation.
• Work closely with the layout engineer to conduct the physical implementation (layout) and chip floor planning.
• Responsible for post-layout extraction and parasitic analysis.
• Able to work with other designers, Chip Architects, and layout engineers to achieve full-chip integration, place and route, top-level verification, and tape out.

Requirements:

• Ph.D./Master/Degree in Electrical Engineering or Microelectronics with excellent technical background in Analog /Mixed-Signal IC design
• Min. 5 years of experience in CMOS Analog IC design and simulation
• Good design experience in Analog IC design involving two or more of the following blocks: low noise pre-amplifier (low offset, high CMRR, high PSRR and bandwidth up to 600MHz), CMOS Gigahertz Oscillator, switched capacitor circuit, LDO, Differential Amplifier, comparator, Opamp, TIA, and Bandgap Reference and high-frequency full-wave rectifier, etc.
• Good design knowledge in ESD and Latch-Up.
• Experience in isolator devices (capacitive-coupler or optical-coupler), Photodetector-associated circuits will be an added advantage.
• Experience with sigma-delta modulators and IO drivers will be an added advantage.
• Good working knowledge of relevant analog IC design and simulation tools (Spice or its equivalent)
• Basic understanding and can develop simple design-related scripts with some common script languages, such as perl, Tcl, matlab or cadence skill etc.
• A team player with good communication skills.
• Able to work independently, flexibly, and creatively.

Key Responsibilities:

• Working on ASIC digital design, including RTL coding based on Verilog, simulation, RTL and gate-level verification, code coverage, testbench development, logic synthesis, and design documentation.

Key Requirements:

• Master/Degree in Electrical Engineering with 3 years of ASIC design.
• experience preferred.
• Familiar with ASIC design flow.
• Experience in RTL coding based on Verilog. Familiar with the digital simulation debugging environment.
• Familiar with UNIX/Linux environment and scripting.
• A team player with good communication skills.
• Able to work independently, flexibly, and creatively.
• Strong analytical and problem solving.

Key Responsibilities:

• Working on ASIC digital design, including RTL coding based on Verilog, simulation, RTL and gate-level verification, code coverage, testbench development, logic synthesis, and design documentation.

Key Requirements:

• Master/Degree in Electrical Engineering with 5 years of ASIC design experience preferred.
• Familiar with ASIC design flow.
• Experience in RTL coding based on Verilog. Familiar with the digital simulation debugging environment.
• Familiar with UNIX/Linux environment and scripting.
• A team player with good communication skills.
• Able to work independently, flexibly, and creatively.
• Strong analytical and problem solving.

Key Responsibilities:

• Conduct research and develop microgrid power management and energy management algorithms.
• Deploy power and energy management applications on microgrid controllers.
• Develop AI/ML/DL solution platforms for various energy management applications.
• Design SLD, sizing, and integration of microgrid DERs, protection circuits, and loads.
• Prepare test cases and conduct microgrid functional, error tests both SIL and on testbeds.
• Emulate microgrids using tools such as Power Factory, Matlab, or Panda Power and integrate with microgrid controller to carry out preliminary SIL tests.

Requirements:

• Bachelor, master’s degree, or Ph.D. in Power Systems, Electrical Engineering or equivalent, with minimum 2 years of experience.
• Experienced in scripting Python, Matlab or equivalent.
• Knowledge of operational principles of microgrids such as on-grid optimization, off-grid optimization, islanding, resynching, and blackstart operations
• AI, ML, DL related experiences in domains such as energy management, predictive analysis, forecasting, and anomaly detection is an added advantage,

Key Responsibilities:

• Conduct research and develop microgrid power management and energy management algorithms.
• Deploy power and energy management applications on microgrid controllers.
• Develop AI/ML/DL solution platforms for various energy management applications.
• Design SLD, sizing, and integration of microgrid DERs, protection circuits, and loads.
• Prepare test cases and conduct microgrid functional, error tests both SIL and on testbeds.
• Emulate microgrids using tools such as Power Factory, Matlab, or Panda Power and integrate with microgrid controller to carry out preliminary SIL tests.

Requirements:

• Bachelor, master’s degree, or Ph.D. in Power Systems, Electrical Engineering or equivalent, with minimum 5 years of experience.
• Experienced in scripting Python, Matlab or equivalent.
• Knowledge of operational principles of microgrids such as on-grid optimization, off-grid optimization, islanding, resynching, and blackstart operations
• AI, ML, DL related experiences in domains such as energy management, predictive analysis, forecasting, and anomaly detection is an added advantage,

Key Responsibilities:

• Conduct research and develop microgrid power management and energy management algorithms.
• Deploy power and energy management applications on microgrid controllers.
• Develop AI/ML/DL solution platforms for various energy management applications.
• Design SLD, sizing, and integration of microgrid DERs, protection circuits, and loads.
• Prepare test cases and conduct microgrid functional, error tests both SIL and on testbeds.
• Emulate microgrids using tools such as Power Factory, Matlab, or Panda Power and integrate with microgrid controller to carry out preliminary SIL tests.

Requirements:

• Bachelor, master’s degree, or Ph.D. in Power Systems, Electrical Engineering or equivalent, with minimum 5 years of experience.
• Experienced in scripting Python, Matlab or equivalent.
• Knowledge of operational principles of microgrids such as on-grid optimization, off-grid optimization, islanding, resynching, and blackstart operations
• AI, ML, DL related experiences in domains such as energy management, predictive analysis, forecasting, and anomaly detection is an added advantage,