Total 121 infrastructure engineer job vacancies in Art / Design / Entertainment category in D05 Clementi New Town, Hong Leong Garden, Pasir Panjang

Job Title: Marine structure engineer ID9024
Location: Beach Road
Working Hours:
Working Hour: Mon to Fri;9am-6pm
Salary: $3500-$5000
Benefit:
*13-month salary
*AL 21 days

Job Description:
•Involved in the design of infrastructure type of works (mostly Marine related).
•Structural Design and analysis (reinforced concrete, steel design, ship-shore design)
•Coordinate and review drafting work
•Marine engineering (ship-shore interface design, design of berthing and mooring equipment, determine environmental loads on port structures like breakwaters, jetties, quay walls and offshore foundations
•Other ad-hoc duties as assigned

Requirement:
•Minimum degree in Marine Engineering
•Fresh graduate are welcome to apply

Responsibilities:

• Full responsible for Netlist-to-GDS physical design implementation of 12nm/6nm/4nm and below advanced process chips.
• Block owner, take block of 2~3 Million instances, working on Synthesis/APR(auto place and route)/Signoff
• Block coordinator role for more than 5~10 blocks, solving the critical issue and give the solution to block owners.
• TOP role for the complicated hierarchical chip (more than 20 Million instances plus 500+ macros), doing floorplan and partition, responsible for full chip tapeout

Requirements:

• Bachelor/Master Degree in Electrical/Computer Engineer.
• Experience in physical design with tape-outs.
• Knowledge of complete Netlist-to-GDS flow, Synopsys/Cadence tools like ICC2 or Innovus.
• Good in script programming with Perl, TCL/TK or other languages.

• Assist QP(Architect) in carrying out supervision for Architectural works and its related works.
• Assist Client / Consultants in monitoring and coordination of Architectural works to be completed by Contractors to facilitate project completion, inspections and handover.
• Lead the architectural site staff to monitor, supervise and inspect works as directed by the client and/or Project Consultants.
• Review all project drawings and specifications, and raise any discrepancies and/or possible problems before construction work commence on site and progressively throughout the entire course of the project;
• Ensure that the contractors carry out their work in compliance with Building Control Act and Regulations, Codes of Practices and requirements of building authorities and government agencies;
• Observe and comply with site safety, and submit all reports as directed and ensure that works are carried out in a safe and proper manner;
• Undertake any other duties related to the project assigned

Job Requirements:

• Degree in Architecture or accreditation with Professional bodies of equivalent standing as Board of Architects, Singapore
• At least 10 years of relevant working experience in Singapore and site supervision of building works, architectural elements and finishing works
• Strong knowledge of Architectural details, working drawings and local construction practices
• Basic knowledge of C&S and M&E shop drawings
• Conversant with Singapore Statutes, Building Codes and Regulations
• Experience in the supervision of building construction, architectural and fitting out works.
• Good supervisory and leadership skills

Job Description:

- Perform Civil, Structural Analysis and Design (entry-level) to meet project specifications

- Coordination and Liaise with Clients, Authority and Other Consultants, Contractors on Projects

- Ensuring Good Project Documentation and Submission to Authority and Clients

- Attend Project Meeting and Perform Inspections on Designed Works

- Reporting to Senior Engineer

Job Requirements:

- Candidate must possess at least a Bachelor's Degree / Post-Graduate Diploma / Professional Degree in Engineering (Civil/ Structural) or equivalent, recognized by Professional Engineering Board of Singapore

- At least 1 Year (s) of working experience in the related field is required for this position

- Good Working Attitude, Self-Motivated, Positive Thinking, Independent, Discipline, Attention to Details and Ownership of Tasks

- Familiar with Local Design Standard and Code

- Knowledge of Design Software, e.g., STAAD Pro, Plaxis, AutoCAD will be added advantage

- Candidate with longer experience or qualifications will be considered for Senior Positions

The position is an exciting opportunity to be part of a flexible and dynamic team in the growing markets of mixed signal chips with signal processing IPs, ARM processor and AMBA bus interface like Wireless Chargers, Bluetooth, PMIC etc. used in Mobile, Tablets, Microcontrollers etc. The role works within the digital design team with the aim to create an efficient Digital Design.

Responsibilities and Duties include but not limited to:

• Work at IP level design, but occasionally also at SOC design.
• Creation of RTL code
• Some opportunities to integrate the IP in the SOC
• UPF flow, Low power Flow, Power aware simulations
• CDC/RDC/LINT checks using various tools
• Verification of concept using Matlab/Simulink and toolboxes
• Synthesis, Scan insertion, ATPG.
• STA.
• Schedule preparation at IP level together with the Design leader and execution adhere to plan.
• Reporting to the management.
• Accountability.

Qualification Requirements:

• Masters in Electronics' Engineering (a relevant experience with minimum 2 years in a semiconductor or high technology R&D environment would be appreciated)
• Some Knowledge/Experience/Exposure as below would be appreciated:

1. ARM based Architectures, AMBA bus, Peripherals, Boot
2. RISC-V architectures
3. Hardware Design Language (such as VHDL or Verilog)
4. CDC, RDC, LINT
5. Synthesis, Scan Insertion, ATPG
6. Physical Design, including Power analysis, Clock tree Synthesis, Power Gating, Physical Checks
7. Power Aware, Low power and UPF methodology
8. Tools porting from Verilog RTL into C++
9. Scripting languages (PERL, TCL, PYTHON)
10. Knowledge in Static Timing Analysis

• Able to work in a multi-cultural team.
• Strong analytical and problem-solving skill.
• Able to keep up with fast moving new design methodology.
• Candidates with extensive experiences will be considered as Staff Engineers/Design Managers
• Salary package will be offered base on working experience

• Liaise with Clients, Architects & Builders.
• Recognized Degree in Civil and Structural Engineering.
• Minimum 5-8 years experience in structural design.
• Familiar with reinforced concrete and steel design.
• Responsible for design and checking of drawings.
• Coordination of project submission to authorities and construction.
• Must be willingly to work on construction sites (dusty & dirty environment), long hours and Sundays/Public Holidays (if required)
• Salary will commensurate base on qualification and experience

All candidates welcome to apply

Key responsibilities:

• Perform IC design of FTDI products
• Perform Verilog RTL design to meet product specifications and requirements
• Perform front-end verification using UV methodology
• Work with Systems and Software engineers on FPGA verification
• Perform Logic Synthesis, Static Timing Analysis
• Lead DFT related activities - Scan Insertion, ATPG, Pattern Validation
• Work with Physical designer to achieve timing closure
• Work with test team in debugging production test issues
• Help debug & correct any functional issues found in taped-out devices
• Participate in design reviews, support ISO processes and documentation

Additional responsibilities:

a) Any reasonable task assigned by management and deemed to be within the individuals’ capabilities to ensure smooth running of the business.

b) As this is an evolving business, ongoing change is an integral part of the position. Management will liaise with the individual on any fundamental change to work practices. The individual is required to embrace and adopt any change to working practices.

Knowledge and skill requirements:

• Degree/Master in Electrical/Electronic Engineering
• 5 years or above experience in the area of digital IC design
• Working experience from design to tape-out are essential
• Experience in Verilog HDL and VHDL RTL design, OVM/UVM verification methodology , Logic Synthesis, DFT, ATPG, Timing Closure
• Experience in using EDA tools from Cadence, Synopsys
• Knowledge and working experience in one or more of the following:

1. Digital and mixed-signal design
2. USB interface products
3. Knowledge in connectivity technology such as USB, UART, SPI, I2C
4. Project Management

Working Conditions:

• Working conditions are normal for an office environment.
• Work requires willingness to work a flexible schedule.

Be part of a team in creating state-of-the-art Secure Low Power SoC ARM-based SoC/MCU for the Low-End , Mid and High-End performance MCU product line in a IC Design Environment.

Responsible:

• Engage design team and architects to strategies DFT Test plan for SoC top level
• Create DFT test modes, scan architecture, clocking and reset architecture.
• Plan Pin-Muxing and Pad and Boundary scan (BSDL) generation
• Execute JTAG TAP network generation and verification.
• Quality check with Spyglass analysis for scan using spyglass tool
• Execute Scan insertion using DC / Tessent tools
• Deploy Scan constraints development for Atspeed, shift and slow capture mode.
• Generate ATPG pattern generation using synopsys Tetramax tools
• Analyze and report on test coverage metrics to ensure comprehensive testing of designs.
• Implement improvements to enhance test coverage and efficiency.
• Verify No-timing and SDF simulation of ATPG patterns using VCS and NCSim tools
• Implement MBIST MBIST repair and verification using Mentor Graphic Tessent tools.
• Boundary scan verification
• Generate STIL test patterns for tester
• Silicon bring-up and failure debug

Requirements:

• Requires BSc/MSc or PhD in electrical and electronic or Computer engineering
• Requires > 5 years or more of experience in DFT at IP and SoC top level. Proficient at using DC ,tetramax and MG tessent DFT tools
• Tape-out at least 5 chips and tested to pass on tester.
• Requires strong understanding of state of the DFT methodology , flat and hierarchical implement of DFT from IP to SoC top.
• Capable of understanding UPF to enable multiple power domain verification
• Capable of leading, review and guiding younger DFT engineers in their daily tasks
• Able to work in a team with a strong drive to excel
• Able to work independently on a given assignment and work hard to finish on time
• Good written and communication skills

Logicalis Singapore is currently looking for a Core Infrastructure Cybersecurity Solutions Architect. This is a technical sales support role for our account management team, reporting directly to Cybersecurity Solution Manager. Your ability to clearly articulate cybersecurity solutions to our existing customer base and prospects is essential.

Your involvement in our opportunities will start with the initial customer meeting and continue through the design phases of the solution. You must be a self-starter, require minimal supervision, and possess strong technical and design skills for enterprise environments. This position requires excellent communications skills (written and verbal), as well as the ability to work as part of a team.

Responsibilities:

1. Supporting sales team in determining security requirement by evaluating business/ customer requirements

2. Responsible to provide pre-sales consulting for:

• Perimeter Defence, including IPS/IDS

• Network Access Control

• Campus LAN networking & wireless solution

• SD-WAN and SASE solution

3. The presales will also responsible to taking customer’s technical, financial, and business requirement into consideration in order to recommend optimal configuration or solution and also deliver presentation, proposals, included with bill of material as result.

Requirements:

• Sound Technical knowledge on the following products

- Cisco networking solution (campus LAN & DC switches, routers, wireless)

- Next generation firewall solution (Palo Alto, Checkpoint, Fortigate)

- HPE Aruba ClearPass

- Cisco Security (Firepower Threat Defense, Identity Service Engine)

- Secure Access Service Edge (SASE) solution

• Knowledge in following products is a plus point

- Cisco Duo, and Cisco Umbrella

- RSA SecurID or equivalent multi-factor authentication solution

- Algosec or equivalent firewall rule management solution

- Gigamon or equivalent network visibility platform solution

• Knowledge in advanced security solutions is a plus point
• Knowledge in infrastructure automation is a plus point
• Knowledge in Linux is a plus point

By submitting your application, you would have deemed to have given consent and have read through the DP notice for Job Applicants here: https://ap.logicalis.com/sites/default/files/2022-10/PIMS-A7.3-01%20Attachment%20I%20DP%20Notice%20for%20Job%20Applicants_updated9sept22.pdf

Job Title: Electrical Design Engineer (ID3317)
Location: Woodlands
Working Hours: Mon-Fri 8am - 5.45pm
Salary: $3000-$3500

Job Description:
• Electrical design for Industrial Automation Systems
• Discuss project specification with sale department, internal design team and customer.
• Ensures project specification is sufficient for electrical design work.
• Ensure the drawing, software and manual are done and issue to the customer
• Support sales department in design concept and costing for new enquiries

Requirements:
• Candidate must possess at least Diploma in Electrical Engineering or fresh graduated from NTU
• Have relevant working experience or fresh graduates from NTU are also encouraged to apply.
• Possess a proficiency in technical knowledge
• A good team player
• Able to commence work immediately.

Recently named as one of the 'Best Big Companies to Work For’ by Best Companies, J. Murphy & Sons Limited (Murphy) is a leading international, specialist engineering and construction company founded in 1951 with a purpose to improve life by delivering world-class infrastructure. Operating in the United Kingdom, Ireland and Canada, Murphy provides better engineered solutions to infrastructure sectors including transportation; natural resources; power and water. Headquartered in London, Murphy has a number of related businesses – Ground Engineering; Utility Connections; Murphy Plant; Murphy Process Engineering; Pipeline Testing Services; Specialist Welding Services; and Electrical Services. Murphy is a specialist in delivering pipelines, design, structural steel, tunnelling, fabrication, bridges and piling, and has a substantial holding of plant, equipment and facilities. Murphy employs around 3,600 engineers, professional managers and skilled operatives around the world. Together, they work as ‘One Murphy’
- directly delivering the people, plant and expertise needed to make projects a success. #MoreToMurphy
Senior Design Engineer – Murphy Applied Engineering – Kentish Town
Fantastic opportunity for a Senior Design Engineer to join Murphy Applied Engineering (MAE), who are the in-house design consultancy for JMS. MAE provide both a temporary and permanent works design service to all of the JMS business units (Major Projects, Transport, Water, Natural Resources (inc. Power), Building and International). If you are a Senior Design Engineer looking for your next role working with a forward thinking and innovative employer then keep reading! What you will be doing


- Represent the design department when necessary at internal and external meetings, Manage the interface with external or in house design teams on behalf of the Design Manager.
- Liaise with other departments and project teams within the company with respect to design requirements.
- Undertake site visits when appropriate.
- Ensure that chargeable work is identified and evaluated including the preparation of adequate records of time spent.
- Collate feedback on designs and saved in accordance with procedure.
- Coach individual staff members.
- Prepare conceptual designs from with a view to the preparation of safe, practical and economic designs in accordance with current legislation.
- Prepare detailed designs in accordance with current standards and codes including calculations, design risk assessments and sufficiently detailed sketches for the preparation of working drawings.
- Check the design work of other staff members and external designers.
- Implementation of Temporary Works requirements and associated registers.

Who we are looking for


- Degree qualified in Mechanical or Civil Engineering
- Preferred experience in Water (e.g. United Utilities) and Energy industries
- Experience of interfacing with clients & developing solutions
- Knowledge and understanding of construction plant & equipment to install pipelines/cables
- Good technical report writing skills suitable for submission to stakeholders and government bodies
- Preferred to have Trenchless Crossing Design Experience
- Design experience associated with linear infrastructure projects (cables and pipelines)
- FEED experience associated with the planning stages of linear infrastructure projects
- Landfall/ Outfall design experience (desired but not necessary)
- Good mechanical/civil design knowledge & able to develop solutions from first principles

Responsibilities

• Responsible for development of new products and product improvements
• Responsible in performing the whole cycle of product design
• Responsible for designing and devleoping of quality product and ensuring manufacturability with other engineering functions involved in product development.
• Responsible in ensuring product designs are validated per customer requirements, respecting international industry standards

Requirements

• Min Degree in Mechanical Engineering, Manufacturing or other relevant discipline
• Min 3 years of working experience in Product Design Development
• Proficient with Pro-Engineer/ CREO/ANSYS/ Autocad

Please kindly email your resume in Ms Word to hr@xtalents.com.sg

We regret to inform that only shortlisted candidates would be notified.

Registration Number: R1328870

EA License No. 22C1026

Job description:

As a member of the filter design team, the successful candidate will play a key design role as a product owner of resonator/filter in development and commercialization of acoustic filters with both BAW and SAW technologies from beginning, concept meeting to end, mass production including characterization.

Experience with either SAW or BAW filter design -layout, simulation, fabrication, and characterization- is required for senior position and principal position is available for candidates with proven track record in ramping up commercialization of acoustics filters in mass production environment.

Responsibilities:

- Co-work with international team across China, Singapore, South Korea, and Europe on a cross-disciplinary team basis

- Use commercial circuit analysis and physical modelling tools as well as custom software packages to design and analyse acoustic filters

- Assist RF measurement analysis by generating test plans and analysing results

- Produce RF engineering reports to support team members

- Communicate with R&D team for co-design and device improvement

Qualifications/Desired skills:

- Track record in design and mass-production of SAW/BAW filters for mobile applications is highly desirable

- Strong skills and working knowledge of design simulation tools, e.g. ADS, AWR, HFSS, COMSOL, etc

- Understanding of RF test parameters and test equipment

- Understanding of filter application and mobile communication system and architecture

- Experience with drawing programs, schematic capture and PCB layout tools

- Experience in RFIC design, RF module and front-end system design is preferred

- Knowledge of MEMS fabrication

- Strong written and verbal English skills to support complex analysis

- Organized team player and a good learner who is open to discussions

Role and Responsibilities:

• Mixed-Signal IC (MEMS Interface) Design Engineer will be responsible for the design and development of capacitive and/or piezoelectric MEMS interface ASICs, including the required amplifiers, ADCs, filters and control logic, with characteristic high impedance inputs, ultra low power, low noise circuits etc .
• The responsibility of the Senior Mixed-Signal IC Design Engineer includes scheduling, design, simulation and layout of mixed-signal circuit blocks, including pre- and post-silicon verification

Requirements:

• Minimum BSEE with hands-on experience in IC Design flow.
• Familiarity with modern EDA tools such as Cadence, Mentor, Synopsys etc.
• Have working knowledge in analog building blocks such as bandgap reference, LDO, amplifiers, low noise amplifiers
• Understanding of ADC topologies eg Delta-Sigma, SAR, flash, integrating etc … advantageous
• A good team player with good communication skills
• Enthusiastic and independent worker.
• Willing to work in Tampines

Meet the Team

The IoT Digital team is a state-of-art IC design team focused on producing world-class Wireless MCU SoCs. The architecture specification, design, verification, and implementation of the Wireless MCU SoCs is the responsibility of the IoT Digital team. These SoCs include an embedded CPU system with analog and digital peripherals, advanced security, state-of-the-art power management, and best-in-class radios to support a wide range of wireless IoT applications and standards.

Responsibilities

The chosen candidate will contribute to, and manage a team for, the development of architecture, microarchitecture, and design of complex, low power, Wireless SoCs. These SoC devices are multi-core, multi-threaded processor subsystems with multi-level cache, capable of supporting multiple wireless protocols and application functionality, such as sensor hub, AI /ML, while meeting best-in-class power and performance targets. The Chip Design lead will define architectures with embedded multi-core, multi-threaded processor subsystems, AI accelerators, bus interconnect, memory architecture and multi-level caches to satisfy performance and throughput requirements. This will include RISC-V, ARM or proprietary processor designs, high-speed interfaces for off-chip memories, integration of wireless systems, power management, and mixed signal IP. The candidate would be responsible for the leading a project through the entire product development process.

• Lead the development and execution of Wireless SoC’s from definition, through execution, and into production
• Definition and Planning
  Coordinate with the product marketing teams to develop the SoC requirements. Provide the necessary design collateral to support the product approval gates.
  Develop and maintain the SoC architecture or technical specification to meet the product requirements, with a key goal to maximize IP reuse.
  Develop the design schedule, including milestones and resource requirements. Coordinate with cross functional teams (such as software) on dependencies.
• Project Execution
  Coordinate with global design functional leads (RF, baseband, verification, etc) to track execution, triage issues, and perform prudent escalation.
  Represent the design community to provide succinct weekly status and attend the cross functional meeting. Drive design action items to closure.
  Perform SoC Design Integration and maintain design collateral such as documentation, register libraries, and pinouts delivered to cross functional teams.
  Follow established quality procedures and processes to achieve first tapeout.
• Validation to Production
  Actively support the validation and product test teams during silicon bringup, validation, characterization, and qualification.
  Triage, track, and resolve issues reported during silicon evaluation. Execute a metal or full layer revision, if necessary

Skills You Will Need

Minimum Qualifications:

• B.Tech/M.Tech in related branches of electronics and computer science with a minimum of 10 years of related experience.
• Capable of leading complex IP, SOC development projects execution. Experience coordinating with contractors a plus.
• Top-down planning and execution of SOC projects.
• Experience in full-chip development cycle
• Able to build strong technical team.
• Hands-on experience in architecture, micro-architecture, digital design processes
• Knowledge of high-speed interfaces like USB, PCIe, Ethernet, Mobile DDR, Quad/Octa-SPI
• Knowledge of peripheral interfaces like SDIO, UART, I2S, I2C, PWM, CAN, etc.
• Knowledge of processors like RISC-V and ARM processors
• Knowledge of design signoff flows including Lint, CDC, Formal Verification, Synthesis, Constraints and STA Timing Closure
• Knowledge of DFT including Scan, ATPG, MBIST
• Knowledge of low power design methodology (static/dynamic clock gating, power gating, dynamic voltage and frequency scaling)
• Knowledge of hardware accelerators
• Knowledge of Verilog and System Verilog
• Knowledge of scripting languages like Perl, Python, Tcl, shell

Benefits & Perks:

You can look forward to the following benefits:

• Employee Stock Purchase Program (ESPP)
• Medical and dental insurance coverage including spouse and child(ren)
• Bi yearly health screening and flu vaccination
• Office location is above Tai Seng MRT station