Total 64 Product Design job vacancies in Art / Design / Entertainment category in George Town

At Cheil, we are passionate about ideas that move.

We believe that the right idea will move seamlessly across channels: from online to offline, above the line to below the line, in-store to out-of-home. It will move brands, move products and most importantly, move people. The right idea will move everything forward.

Established in 1973 with headquarters in Seoul, South Korea, Cheil Worldwide is one of the world’s leading integrated marketing communications networks, with more than 6,800 employees globally in more than 54 offices in 46 countries.

For more information, visit us at: www.cheil.com.

We are inviting candidates for the position of:

Content Publishing / Graphic Design Intern (Full-time internship)

Job description

Working with the Samsung Electronics SEA & Oceania business, you will have the privilege of working within a big data environment where strategic decisions are made, guiding best in class upholding brand compliance.

• Content Audit & Analysis: Work closely with the Content Team to conduct content audits on Samsung.com to ensure content is brand compliant and aligns with our strategic objectives.

• Progress Tracking & Reporting: Analyse, track, and report progress on weekly and monthly reports for multi-market operations, providing insights and recommendations for optimization.

• Training Document Management: Prepare and maintain training documents, Standard Operating Procedures (SOPs), and any other necessary documents to support team operations and knowledge transfer.

• Assist in Design Projects: Execute simple design tasks such as key visual adaptations for regional campaigns, ensuring alignment with brand guidelines and creative direction.

• Asset Management: Organize and maintain digital assets, including images, graphics, and other design elements, to facilitate efficient workflow and collaboration within the team.

Desired Skills and Experience

• Good skill in Excel and PPT

• Good skill in Adobe Illustrator and Photoshop

• Pursuing or recently completed a degree in Graphic Design, Visual Communication, or a related field.

• Analytical and quantitative, with strong attention to detail

• Self-starter with excellent communication and collaboration skills, with the ability to work effectively in a team environment.

• Ability to thrive in a fast-paced, ambiguous, interruptive environment

• Ability to work independently as well as work collaboratively toward a common goal

Responsibilities:

• Conduct Solution Architecture activities when required on Bids and Projects, in close collaboration with Systems Engineers and reporting to the PDA in that case. In charge of proposing Solution Compliance.
• Support the Solution Orientation Review (SOR) for Bids in collaboration with the Solution Engineering Manager (Bids), Services Engineering and assigned bid team members.
• Propose draft DVa and report to the PDA in terms of Solution definition for allocated Bids/Projects.
• Ensure that the design of the Solution satisfies:
  • Customer needs and contractual requirements for a project,
  • Contractually applicable technical standards,
  • Alignment with the Product Policy,
  • Cost effectiveness, and
  • Applicable design legislation, rules and regulations.
• Ensures, with the support of Specialty Engineering experts & HSE stakeholders that:
  • Solution design takes into account contract requirements in terms of Safety, Security and Human Factors and applicable legislation, rules & regulations, including Environmental/HSE requirements & standards,
  • Related certification activities are performed correctly.
• Particular focus on risks qualification and quantification and mitigation actions at Bid phase and follow-up at Project phase. Risks must be understood and mastered.
• Participate in specific actions plans and dedicated task forces as allocated to solve complex technical problems.
• Contribute to elaborate the TopSKY-ATC product policy through commonalising specific Solutions required by projects and support the HE Product Design Authority in maintaining a rigorous Product policy.
• Take charge of a Technical Speciality when required (e.g. Network & Infrastructure) with the aim to:
  • be the subject-matter expert within the organization,
  • provides a conduit for the sharing of state-of-the-art knowledge across the discipline,
  • be responsible for capitalisation within his/her discipline.
• Pro-actively share knowledge with the experts network inside the AMS Business Line and participate when required into external events in the technical & ATM expert fields to represent Thales AMS.

Requirement:

• Tertiary Qualifications in Engineering
• Degree in computer sciences (minimum Bachelor of Sciences) and network discipline
• 7 years minimum of experience holding positions in systems engineering and/or software engineering and/or integration on complex software-centric real-time systems.
• A proven track-record in supporting the design of Solutions for complex System Of Systems.
• Proven capability to work in a multi-cultural environment and with variety of international customers.
• Experience in the ATM Domain is mandatory.
• Language: fluent English, French would be a plus.
• International work context
• Aptitude to work effectively as part of a team.
• Resilience under pressure.
• Capacity to learn quickly.
• Capability to manage various stakeholders having different objectives.

Responsibilities:

• Full responsible for Netlist-to-GDS physical design implementation of 12nm/6nm/4nm and below advanced process chips.
• Block owner, take block of 2~3 Million instances, working on Synthesis/APR(auto place and route)/Signoff
• Block coordinator role for more than 5~10 blocks, solving the critical issue and give the solution to block owners.
• TOP role for the complicated hierarchical chip (more than 20 Million instances plus 500+ macros), doing floorplan and partition, responsible for full chip tapeout

Requirements:

• Bachelor/Master Degree in Electrical/Computer Engineer.
• Experience in physical design with tape-outs.
• Knowledge of complete Netlist-to-GDS flow, Synopsys/Cadence tools like ICC2 or Innovus.
• Good in script programming with Perl, TCL/TK or other languages.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

Be part of a team in creating state-of-the-art Secure Low Power SoC ARM-based SoC/MCU for the Low-End , Mid and High-End performance MCU product line in a IC Design Environment.

Responsible:

• Engage design team and architects to strategies DFT Test plan for SoC top level
• Create DFT test modes, scan architecture, clocking and reset architecture.
• Plan Pin-Muxing and Pad and Boundary scan (BSDL) generation
• Execute JTAG TAP network generation and verification.
• Quality check with Spyglass analysis for scan using spyglass tool
• Execute Scan insertion using DC / Tessent tools
• Deploy Scan constraints development for Atspeed, shift and slow capture mode.
• Generate ATPG pattern generation using synopsys Tetramax tools
• Analyze and report on test coverage metrics to ensure comprehensive testing of designs.
• Implement improvements to enhance test coverage and efficiency.
• Verify No-timing and SDF simulation of ATPG patterns using VCS and NCSim tools
• Implement MBIST MBIST repair and verification using Mentor Graphic Tessent tools.
• Boundary scan verification
• Generate STIL test patterns for tester
• Silicon bring-up and failure debug

Requirements:

• Requires BSc/MSc or PhD in electrical and electronic or Computer engineering
• Requires > 5 years or more of experience in DFT at IP and SoC top level. Proficient at using DC ,tetramax and MG tessent DFT tools
• Tape-out at least 5 chips and tested to pass on tester.
• Requires strong understanding of state of the DFT methodology , flat and hierarchical implement of DFT from IP to SoC top.
• Capable of understanding UPF to enable multiple power domain verification
• Capable of leading, review and guiding younger DFT engineers in their daily tasks
• Able to work in a team with a strong drive to excel
• Able to work independently on a given assignment and work hard to finish on time
• Good written and communication skills

The position is an exciting opportunity to be part of a flexible and dynamic team in the growing markets of mixed signal chips with signal processing IPs, ARM processor and AMBA bus interface like Wireless Chargers, Bluetooth, PMIC etc. used in Mobile, Tablets, Microcontrollers etc. The role works within the digital design team with the aim to create an efficient Digital Design.

Responsibilities and Duties include but not limited to:

• Work at IP level design, but occasionally also at SOC design.
• Creation of RTL code
• Some opportunities to integrate the IP in the SOC
• UPF flow, Low power Flow, Power aware simulations
• CDC/RDC/LINT checks using various tools
• Verification of concept using Matlab/Simulink and toolboxes
• Synthesis, Scan insertion, ATPG.
• STA.
• Schedule preparation at IP level together with the Design leader and execution adhere to plan.
• Reporting to the management.
• Accountability.

Qualification Requirements:

• Masters in Electronics' Engineering (a relevant experience with minimum 2 years in a semiconductor or high technology R&D environment would be appreciated)
• Some Knowledge/Experience/Exposure as below would be appreciated:

1. ARM based Architectures, AMBA bus, Peripherals, Boot
2. RISC-V architectures
3. Hardware Design Language (such as VHDL or Verilog)
4. CDC, RDC, LINT
5. Synthesis, Scan Insertion, ATPG
6. Physical Design, including Power analysis, Clock tree Synthesis, Power Gating, Physical Checks
7. Power Aware, Low power and UPF methodology
8. Tools porting from Verilog RTL into C++
9. Scripting languages (PERL, TCL, PYTHON)
10. Knowledge in Static Timing Analysis

• Able to work in a multi-cultural team.
• Strong analytical and problem-solving skill.
• Able to keep up with fast moving new design methodology.
• Candidates with extensive experiences will be considered as Staff Engineers/Design Managers
• Salary package will be offered base on working experience

The School of Media, Arts & Design in Singapore Polytechnic is looking to hire a Temporary Video Design Assistant.

Responsibilities:

• Editing simple videos for social media and promotional content, creating posters for events and campaigns, and engaging with students to enhance participation and feedback.
• Fostering student engagement through communication on various platforms, organizing activities, and soliciting input for improvement.

Requirements:

• Proficient in video editing software (Adobe Premiere Pro), graphic design tools (e.g., Canva/Illustrator)
• Able to work independently
• Possess good communication and interpersonal skills

Working Hours:

Mon - Thur 8.30am-6.00pm

Fri 8.30am-5.30pm

Contract Duration:

11 months starting from May 2024

Founded in 2006, IGG is a leading global mobile games developer and publisher committed to making amazing innovative games for players all over the world. Our games are available in 23 different languages, and are enjoyed by 38 million monthly active users from over 200 countries and regions.

At IGG, we are innovators at work, gamers at heart.

We are currently on the lookout for a Game Design Intern to join us!

Responsibilities:

Collaborate with the game design team to create game concepts, mechanics, and systems

Assist in designing and balancing game levels, and challenges

Conduct playtesting and provide feedback on game mechanics and user experience

Assist in creating and maintaining game design documentation and spreadsheets

Requirements:

Has education background in game design or game development

Proficiency in Unity is a bonus.

Excellent communication and teamwork skills.

Ability to work independently and take initiative.

What’s in it for you!

Excellent projects and team members conducive to personal growth

Vibrant work environment

Well stocked pantry

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a self-motivated candidate with expertise in high performance digital design and system level architecture modeling to join our Heterogeneous System design team. This candidate will work closely with IME’s advanced packing team and contribute to the exploration, optimization and development of multicore & multi-chip system using IME’s heterogeneous integration platform.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to the design and development of digital integrated circuits, ensuring they meet performance and functionality requirements.

o <!-Emphasize a system-level perspective in the design process, considering overall system architecture and functionality.

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments.

o Incorporate Edge AI principles into digital IC designs, enabling efficient and intelligent processing at the edge of the network.

o RTL implementation for custom circuit design using Verilog/SystemVerilog

o Derive specs and implement necessary customized and highly efficient building blocks such as systolic array, data path controller, scheduler, integer and floating-point processing engine, FFT, etc which are frequency used in various computing architecture such as in-memory computing, deep learning and neuromorphic computing.

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of digital designs to validate functionality and performance.

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure.

o Contribute to power analysis activities and implement power-efficient design techniques.

Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II.

· Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture.

· Prepare detailed design documentation, including specifications, test plans, and reports.

· Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues.

· Bring creative and innovative solutions to design challenges, staying abreast of industry trends and emerging technologies.

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

Recently named as one of the 'Best Big Companies to Work For’ by Best Companies, J. Murphy & Sons Limited (Murphy) is a leading international, specialist engineering and construction company founded in 1951 with a purpose to improve life by delivering world-class infrastructure. Operating in the United Kingdom, Ireland and Canada, Murphy provides better engineered solutions to infrastructure sectors including transportation; natural resources; power and water. Headquartered in London, Murphy has a number of related businesses – Ground Engineering; Utility Connections; Murphy Plant; Murphy Process Engineering; Pipeline Testing Services; Specialist Welding Services; and Electrical Services. Murphy is a specialist in delivering pipelines, design, structural steel, tunnelling, fabrication, bridges and piling, and has a substantial holding of plant, equipment and facilities. Murphy employs around 3,600 engineers, professional managers and skilled operatives around the world. Together, they work as ‘One Murphy’
- directly delivering the people, plant and expertise needed to make projects a success. #MoreToMurphy
Senior Design Engineer – Murphy Applied Engineering – Kentish Town
Fantastic opportunity for a Senior Design Engineer to join Murphy Applied Engineering (MAE), who are the in-house design consultancy for JMS. MAE provide both a temporary and permanent works design service to all of the JMS business units (Major Projects, Transport, Water, Natural Resources (inc. Power), Building and International). If you are a Senior Design Engineer looking for your next role working with a forward thinking and innovative employer then keep reading! What you will be doing


- Represent the design department when necessary at internal and external meetings, Manage the interface with external or in house design teams on behalf of the Design Manager.
- Liaise with other departments and project teams within the company with respect to design requirements.
- Undertake site visits when appropriate.
- Ensure that chargeable work is identified and evaluated including the preparation of adequate records of time spent.
- Collate feedback on designs and saved in accordance with procedure.
- Coach individual staff members.
- Prepare conceptual designs from with a view to the preparation of safe, practical and economic designs in accordance with current legislation.
- Prepare detailed designs in accordance with current standards and codes including calculations, design risk assessments and sufficiently detailed sketches for the preparation of working drawings.
- Check the design work of other staff members and external designers.
- Implementation of Temporary Works requirements and associated registers.

Who we are looking for


- Degree qualified in Mechanical or Civil Engineering
- Preferred experience in Water (e.g. United Utilities) and Energy industries
- Experience of interfacing with clients & developing solutions
- Knowledge and understanding of construction plant & equipment to install pipelines/cables
- Good technical report writing skills suitable for submission to stakeholders and government bodies
- Preferred to have Trenchless Crossing Design Experience
- Design experience associated with linear infrastructure projects (cables and pipelines)
- FEED experience associated with the planning stages of linear infrastructure projects
- Landfall/ Outfall design experience (desired but not necessary)
- Good mechanical/civil design knowledge & able to develop solutions from first principles

Job description:

As a member of the filter design team, the successful candidate will play a key design role as a product owner of resonator/filter in development and commercialization of acoustic filters with both BAW and SAW technologies from beginning, concept meeting to end, mass production including characterization.

Experience with either SAW or BAW filter design -layout, simulation, fabrication, and characterization- is required for senior position and principal position is available for candidates with proven track record in ramping up commercialization of acoustics filters in mass production environment.

Responsibilities:

- Co-work with international team across China, Singapore, South Korea, and Europe on a cross-disciplinary team basis

- Use commercial circuit analysis and physical modelling tools as well as custom software packages to design and analyse acoustic filters

- Assist RF measurement analysis by generating test plans and analysing results

- Produce RF engineering reports to support team members

- Communicate with R&D team for co-design and device improvement

Qualifications/Desired skills:

- Track record in design and mass-production of SAW/BAW filters for mobile applications is highly desirable

- Strong skills and working knowledge of design simulation tools, e.g. ADS, AWR, HFSS, COMSOL, etc

- Understanding of RF test parameters and test equipment

- Understanding of filter application and mobile communication system and architecture

- Experience with drawing programs, schematic capture and PCB layout tools

- Experience in RFIC design, RF module and front-end system design is preferred

- Knowledge of MEMS fabrication

- Strong written and verbal English skills to support complex analysis

- Organized team player and a good learner who is open to discussions

Responsibilities:

• Manage and support the interior design development and coordination process throughout the design and documentation phases.
• Manage the execution of interior works from tender till completion and handover
• Monitor to ensure resolution of design and technical coordination issues at site
• Review of Contractors’ submissions, work schedules, materials samples, shop drawings etc.
• Conduct site & factory visits, monitoring of quality of on and off-site fabrication
• Monitor and report of interior works progress and qualities, to ensure delivery timeline and workmanship

Requirements:

• Degree in Interior Architecture / Architecture or any related field
• At least 6 years of relevant experience in Interior Design & Site Execution, preferably with premium residential, offices, hotels experiences
• Self-driven, and able to work independently.
• Ability to multi-task and to work under pressure.
• Excellent problem-solving skill.
• Strong organizational, communication and interpersonal skill.
• Proficient in Project Management Programs, AutoCAD, SketchUp, 3D Max, Illustrator or other design programs, Microsoft Excel, Word, etc.

Responsibilities:

• Collaborate closely with the Project Director and multidisciplinary teams to develop innovative design solutions, from concept through to construction.
• Manage project and design processes, ensuring timely delivery and adherence to deadlines, budgets, and regulatory requirements.
• Supervise and review drawings to ensure design constructability, contributing to firm-wide design excellence and problem-solving.
• Demonstrate creative thinking abilities and contributes to firm-wide design excellence and problem solving.
• Provide influencing ideas to enhance team productivity.
• Collaborate with project managers to execute design visions within project constraints, including timelines, budgets, and regulatory requirements.
• Ensure project filing is accordance to officewide standard system.
• Incorporates integrated sustainable design solutions into projects.
• Participates in managing client relationships and representing Company Brand when meeting with clients and other consultants.
• Attend presentations and meetings with client, consultants, and key stakeholders.
• Understands company agreements, contracts, and deliverables, and assures that company standards for project management are met.
• Contribute to the firm's promotion by participating in professional organizations and events, including international travel for project meetings, site visits, and business development as necessary.

Requirements:

• Bachelor's or Master's degree in Landscape Architecture, Architecture, or related field from an accredited institution.
• 7 to 10 years of professional experience in landscape architecture or related design field, demonstrating creative excellence.
• Proficient in AutoCAD, Revit, Adobe Creative Suite, SketchUp, Rhino; familiarity with BIM (Building Information Modeling) is a significant asset.
• Exceptional verbal and written communication skills, able to present concepts clearly and persuasively.
• Strong teamwork and interpersonal abilities, with experience in multidisciplinary collaboration.
• Professional licensure preferred but not required.