Total 3,841 job vacancies in Singapore

• Well Established Company
• Basic $2000 - $2700 + OT + AWS + Variable Bonus
• Excellent Welfare and Benefits + Career progression
• Working location: Tuas (Company Transport Provided at various location)
• Working hours: 5.5 days’ work week (Mon-Fri: 8am – 5pm; Sat: 8am – 12pm) / Shift Work (Day: 8am – 8pm, Night: 8pm – 8am)

Job Responsibilities:

• Operate the process to meet the conditions specified in manuals/instructions
• Operate the process equipment at site in accordance with operation plan
• To maintain and make sure that all equipment are in good working condition
• To prepare chemical solutions according to SOP and guideline
• Assist in coordination of daily maintenance, and participating in maintenance activities and shutdown/start-up of sections
• To perform 5S and ensure a secure, clean and safe work area
• Other ad hoc duties as assigned

Job Requirements:

• Minimum ITE or Diploma holder; Engineering or Chemistry field preferred
• Experience in chemical engineering and analytical procedures preferred

Candidates are encouraged to apply this position via Apply Now button with the following information in the resume

• Work experiences and job responsibilities
• Current and Expected salary
• Reason for leaving
• Date of availability
• Education background

We regret that only shortlisted candidates will be contacted.

LIONG ZHAO GUAN (R22107632)

EA Recruitment Pte Ltd

EA License No: 21C0492

We are seeking a Business Support Executive to provide comprehensive support to senior management, with a strong focus on budget reporting, management updates, and business operations support. This role goes beyond traditional administrative work — you will be actively involved in preparing business reports, coordinating management updates, and ensuring smooth communication across teams.

• Prepare budget reports, tracking expenses, and compiling updates for management.
• Coordinate executive meetings, including agendas, materials, logistics, and follow-ups.
• Manage schedules, correspondence, and preparing briefing decks for senior management.
• Maintain documentation and reporting systems to ensure smooth business operations.

Requirements:

• Diploma or degree in Business Administration or equivalent.
• Proven experience in business/management support in the Construction/Engineering sector.
• Strong skills in MS Excel and PowerPoint, with hands-on experience preparing reports and presentations.
• Excellent communication, organizational skills, and ability to work independently.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to hr@recruit-expert.com

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

Job Description:

- Preparation and filing of reports

- ⁠Review of reports

- ⁠Coordination with client on after sale services

- ⁠Preparation of quotation

- ⁠Carry out site survey

Requirements:

- Background in engineering preferred

- ⁠Proficient in autocad

- ⁠Able to work independently

- Add in the usual skills for MS office and things like work under pressure, fast pace etc.

Job Description

• Industry/ Organization Type: Manufacturing
• Position Title: Engineering & Quoting Manager
• Working Location: Tai Seng
• Working Hours: 5 days (Mon – Fri, 8.00am – 5.45pm)
• Salary Package: Basic salary + AWS + Performance Bonus
• Duration: Permanent Role

Key Responsibilities

• Coordinate with the Senior Management team
• Create, track, and manage department KPIs, trends, goals, and objectives
• Train, develop, and support supervisors, leads, and technicians
• Take responsibility for creating and maintaining technical documentation (e.g. drawings, models, NPI, SOP, OMS)
• Maintain and continuously improve processes using ISO-documented procedures
• Ensure strong understanding and proper use of ERP/MRP systems and data accuracy
• Lead root cause analysis and resolution through CAR and OFI processes
• Maintain and track ECOs and EOL items
• Communicate regularly with related departments and customers on the status of engineering projects and RFQs
• Use checklists to ensure teams properly review standards and requirements, including equipment, packaging, and tooling, before order processing
• Set standards for cost, labour, pricing, and lead times to ensure timely and consistent quotations
• Negotiate and improve supplier pricing, focusing on value, cost efficiency, and competitiveness
• Deliver accurate and timely cost estimates to support profitability and market competitiveness
• Perform other duties as assigned by the Business Unit Director
• Conduct personnel performance reviews and assessments

APPLY NOW!!!

• Bachelor’s degree in Business Management, Engineering, or equivalent practical experience
• Proficient in Microsoft Office, with hands-on experience in data handling and Excel reporting
• Prior experience using ERP/MRP systems
• Able to interpret customer-provided technical drawings, BOMs, and procedures

Kindly apply through ANY of the following methods:

• Submit your application by clicking the APPLY button;
• Email your resume to Job@anradus.com.sg. Please indicate #82137 on the email subject.

Anradus Application Policy: We value each application and ensure every resume is reviewed. Our process is efficient, typically concluding within 3 working days. If you do not receive communication from us within this timeframe, it's likely that your application has not been shortlisted by our client. In such cases, we recommend continuing your job search to maximize your opportunities.

Anradus Pte Ltd | EA License No. 20C0161 | Angel Lim | EA Reg No.: R1769781

Step into a career with ASM, where cutting edge technology meets collaborative culture. ​

For over 55 years ASM has been ahead of what’s next, at the forefront of innovation and what’s technologically possible. With more than 4,500 ASMers representing 70 nationalities, our people and our advanced semiconductor devices are playing a crucial role in trends such as 5G, cloud computing, AI, and autonomous driving.  But we’re more than just a tech company. We value diversity, inclusion and sustainability as we strive to make a positive impact on the world.  Our development programs help support your growth, shaping your future and pushing the boundaries of innovation to unleash potential.  

Job's mission

Join ASM’s Advanced Packaging team and lead the design and development of next-generation semiconductor process equipment. In this role, you will shape system architecture, drive automation strategies, and collaborate across functions to deliver innovative solutions. Your expertise will ensure projects meet the highest standards of safety, quality, and performance.

What you will be working on

• Lead design and development of semiconductor vacuum systems, including equipment selection, process controls, and automation integration.
• Develop and implement automation strategies using PLCs, SCADA, and related tools to optimize efficiency.
• Manage project timelines, budgets, and resources while ensuring compliance with safety and quality standards.
• Collaborate with cross-functional teams in manufacturing, operations, and quality to align on goals and deliverables.
• Provide technical support and troubleshooting for equipment and automation systems, driving root cause analysis and resolution.
• Own BOM release and maintenance, ensuring accurate documentation and reporting for stakeholders.
• Drive continuous improvement initiatives and stay current with industry trends and emerging technologies.
• Apply engineering principles and research data to create designs for semiconductor systems and products.
• Perform engineering calculations for structural, thermal, and fluid dynamics challenges.
• Create and revise CAD models and detailed drawings using Creo Parametric for components and assemblies.
• Prepare comprehensive design documentation for manufacturing and testing of prototypes and production products.

What we are looking for

• Bachelor's, Master’s or PhD in Mechanical Engineering or related field.
• Minimum 8 years of experience in semiconductor equipment design, development, and automation.
• Expertise in complex mechanical systems such as reactors, vacuum chambers, gas delivery systems, pneumatics, and cooling circuits.
• Strong analytical and problem-solving skills with ability to lead innovative design concepts.
• Experience with PLC programming and revision control tools such as Git.
• Ability to work independently and collaboratively in a team environment.

What sets you apart

• Experience with semiconductor capital equipment and metal deposition products.
• Knowledge of CE, NFPA, Semi S2-95, and other relevant standards for semiconductor manufacturing equipment.
• Familiarity with materials including metals, plastics, coatings, and finishes.
• Proficiency in Microsoft applications, CREO, and AutoCAD.
• Knowledge of ASME Y14.5 and/or ISO 1101:2017 geometric dimensioning and tolerancing.
• Strong communication skills to present design concepts effectively to peers and management.
• Ability to manage multiple priorities and meet aggressive deadlines while maintaining quality standards.

Apply today to be part of what’s next.

We make the tech that enables the chips in devices which improve lives around the world. We do this with an eye to the future, pushing the boundaries of what’s possible through cutting-edge innovation, and driving the next wave of technological breakthroughs that shape how we live, work, and connect.

To learn more about ASM, find us at asm.com and on LinkedIn, Facebook, Instagram, X and YouTube.

ASM is an equal opportunity employer and considers qualified applicants for employment without regard to race, color, religion, age, nationality, social or ethnic origin, sexual orientation, gender, gender identify or expression, marital status, pregnancy, political affiliation, disability, genetic information, veteran status, or any other characteristic protected by law.

The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM).

This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements.

The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle.

Key Responsibilities

Probe Coverage Strategy & Ownership

• Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands.

• Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives are met without unnecessary test overhead.

• Establish probe limits and guard‑bands based on silicon characterization, design intent, and customer specifications, with clear alignment to downstream test.

• Lead probe enablement for new product introductions (NPI) and technology ramps, identifying coverage and manufacturability risks early and driving mitigation plans.

Pre‑Silicon Design‑to‑Probe Staging & DFT Readiness

• Partner with Design, DFT, and DV teams during pre‑silicon phases to drive effective design‑to‑probe staging.

• Review and influence DFT architecture, test hooks, observability, redundancy, and trim structures to enable efficient and manufacturable probe coverage.

• Participate in pre‑silicon verification and simulation reviews to reduce first‑silicon debug risk.

• Define probe coverage intent early and ensure continuity from design features through probe and downstream test (shift‑left learning).

First Silicon Bring‑Up & Device Characterization

• Support first‑silicon bring‑up using engineering probe platforms and lab‑based characterization setups.

• Perform silicon and device‑level characterization (parametric behavior, margins, trims, stress response) to inform probe limits and screening strategy.

• Correlate early silicon behavior with probe results to validate coverage intent, identify gaps, and eliminate redundant content.

• Provide early silicon learning to accelerate probe flow stabilization and yield ramp.

Yield, Quality & Reliability Enablement

• Drive wafer‑level yield learning, bin definitions, and failure‑mode analysis at probe.

• Enable intrinsic and extrinsic screening strategies in collaboration with Reliability teams.

• Provide structured, data‑backed feedback to Fab, Process Integration, Design, and DV teams to close learning loops efficiently.

Test Efficiency & Cost Optimization

• Drive test efficiency improvements through coverage right‑sizing and flow optimization, aligned to product and market needs.

• Support wafer‑level speed (WLS) activities as part of broader probe optimization efforts.

• Balance coverage, yield, quality, and cost trade‑offs using silicon data and product risk understanding.

Data, Analytics & AI Enablement

• Leverage probe, inline, and reliability data for yield analysis, anomaly detection, and decision support.

• Contribute to AI/ML initiatives such as predictive probe, smart sampling, and test optimization.

• Apply data‑driven insights to continuously improve probe effectiveness and efficiency.

Artificial Intelligence

• Using, applying, and leveraging AI, identify opportunities to streamline workflows, optimize processes, and support innovation by incorporating AI-driven solutions and enabling data-driven decision-making across projects and teams

Experience Level & Entry Consideration

This role is open to both early‑career and experienced engineers, with leveling (GJS) aligned to technical depth, scope of ownership, and demonstrated impact.

• Fresh Bachelor’s/Master’s / PhD Graduates

• Strong fundamentals in semiconductor devices, circuits, physics, or process technology.

• Academic, research, or internship exposure to silicon behavior, characterization, variability, reliability, or design analysis.

• Will grow into full probe ownership with mentorship, focusing on device, design, and process understanding.

• Experienced Engineers (Eligible for Higher GJS)

• Prior experience in product engineering, device engineering, process integration, silicon characterization, or design‑facing roles.

• Demonstrated ownership of first‑silicon learning, qualification strategy, yield mechanisms, or cross‑functional technical trade‑offs.

• Comfortable influencing upstream and downstream teams through technical insight and silicon‑based decision‑making.

Required Qualifications

• Bachelor’s, Master’s degree, or Phd in Electrical / Electronics Engineering, Computer Engineering (with strong hardware, circuits, or semiconductor focus), Semiconductor Physics, or related field.

• Strong fundamentals in semiconductor devices, wafer test, and product engineering.

• Demonstrated ability to use silicon behavior and characterization data to make informed probe, yield, and coverage decisions.

• Experience or strong interest in silicon learning, device behavior, yield mechanisms, DFT intent, or design‑to‑manufacturing integration.

• Strong analytical skills and ability to drive structured root‑cause analysis.

• Effective communication skills and ability to work across global, cross‑functional teams.

Preferred Qualifications

• Experience with NAND / memory products.

• Experience working directly with Design, Process Integration, or Device teams to resolve silicon or product issues.

• Exposure to probe flow optimization, yield learning, or test cost reduction.

• Familiarity with DFT verification, reliability screening, or test correlation methodologies.

• Experience with Python, SQL, JMP, or data / ML tools.

• Demonstrated ability to independently drive complex technical problems from concept through execution.

Career Growth & Impact

• Direct ownership of probe strategy and quality outcomes across the product lifecycle.

• Exposure to advanced technology nodes, customer‑driven requirements, and large‑scale manufacturing systems.

• Clear growth paths across senior technical contributor, product leadership, or people management tracks within STPG Product Engineering.
  

  Performs hardware, software, semiconductor design or telecomm engineering assignments. This job mapping should be used only if the position cannot be mapped specifically to other design/development engineering jobs.

Key Responsibilities:

• Carry out daily inventory store activities;
• Receive, inspect, and verify incoming materials, goods, and supplies against delivery documentation;
• Issue materials and products in accordance with authorized requests and record all stock movements;
• Work with inventory store manager-in-charge to review process workflow and implement process improvements to increase efficiency and effectiveness;
• Ensure safe, proper and effective housekeeping of inventory store;
• Issue items, update inventory and monitor stock levels;
• Manage disposal of waste and carry out regular inspections of inventory store items and storage conditions;
• Label, store and file stock items and ensure all required documentation are completed;
• Conduct regular stock takes, support reconciliation and compile necessary reports;
• Allocate storage space and ensure safe equipment handling at all times;
• Participate in innovation and work improvement projects;
• Perform any other duties as assigned.
  

The ideal candidate should preferably:-

• Possess at least Nitec/Higher Nitec qualifications; and
• Be willing to perform shift work.

The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM).

This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements.

The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle.

Key Responsibilities

Probe Coverage Strategy & Ownership

• Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands.

• Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives are met without unnecessary test overhead.

• Establish probe limits and guard‑bands based on silicon characterization, design intent, and customer specifications, with clear alignment to downstream test.

• Lead probe enablement for new product introductions (NPI) and technology ramps, identifying coverage and manufacturability risks early and driving mitigation plans.

Pre‑Silicon Design‑to‑Probe Staging & DFT Readiness

• Partner with Design, DFT, and DV teams during pre‑silicon phases to drive effective design‑to‑probe staging.

• Review and influence DFT architecture, test hooks, observability, redundancy, and trim structures to enable efficient and manufacturable probe coverage.

• Participate in pre‑silicon verification and simulation reviews to reduce first‑silicon debug risk.

• Define probe coverage intent early and ensure continuity from design features through probe and downstream test (shift‑left learning).

First Silicon Bring‑Up & Device Characterization

• Support first‑silicon bring‑up using engineering probe platforms and lab‑based characterization setups.

• Perform silicon and device‑level characterization (parametric behavior, margins, trims, stress response) to inform probe limits and screening strategy.

• Correlate early silicon behavior with probe results to validate coverage intent, identify gaps, and eliminate redundant content.

• Provide early silicon learning to accelerate probe flow stabilization and yield ramp.

Yield, Quality & Reliability Enablement

• Drive wafer‑level yield learning, bin definitions, and failure‑mode analysis at probe.

• Enable intrinsic and extrinsic screening strategies in collaboration with Reliability teams.

• Provide structured, data‑backed feedback to Fab, Process Integration, Design, and DV teams to close learning loops efficiently.

Test Efficiency & Cost Optimization

• Drive test efficiency improvements through coverage right‑sizing and flow optimization, aligned to product and market needs.

• Support wafer‑level speed (WLS) activities as part of broader probe optimization efforts.

• Balance coverage, yield, quality, and cost trade‑offs using silicon data and product risk understanding.

Data, Analytics & AI Enablement

• Leverage probe, inline, and reliability data for yield analysis, anomaly detection, and decision support.

• Contribute to AI/ML initiatives such as predictive probe, smart sampling, and test optimization.

• Apply data‑driven insights to continuously improve probe effectiveness and efficiency.

Artificial Intelligence

• Using, applying, and leveraging AI, identify opportunities to streamline workflows, optimize processes, and support innovation by incorporating AI-driven solutions and enabling data-driven decision-making across projects and teams

Experience Level & Entry Consideration

This role is open to both early‑career and experienced engineers, with leveling (GJS) aligned to technical depth, scope of ownership, and demonstrated impact.

• Fresh Bachelor’s/Master’s / PhD Graduates

• Strong fundamentals in semiconductor devices, circuits, physics, or process technology.

• Academic, research, or internship exposure to silicon behavior, characterization, variability, reliability, or design analysis.

• Will grow into full probe ownership with mentorship, focusing on device, design, and process understanding.

• Experienced Engineers (Eligible for Higher GJS)

• Prior experience in product engineering, device engineering, process integration, silicon characterization, or design‑facing roles.

• Demonstrated ownership of first‑silicon learning, qualification strategy, yield mechanisms, or cross‑functional technical trade‑offs.

• Comfortable influencing upstream and downstream teams through technical insight and silicon‑based decision‑making.

Required Qualifications

• Bachelor’s, Master’s degree, or Phd in Electrical / Electronics Engineering, Computer Engineering (with strong hardware, circuits, or semiconductor focus), Semiconductor Physics, or related field.

• Strong fundamentals in semiconductor devices, wafer test, and product engineering.

• Demonstrated ability to use silicon behavior and characterization data to make informed probe, yield, and coverage decisions.

• Experience or strong interest in silicon learning, device behavior, yield mechanisms, DFT intent, or design‑to‑manufacturing integration.

• Strong analytical skills and ability to drive structured root‑cause analysis.

• Effective communication skills and ability to work across global, cross‑functional teams.

Preferred Qualifications

• Experience with NAND / memory products.

• Experience working directly with Design, Process Integration, or Device teams to resolve silicon or product issues.

• Exposure to probe flow optimization, yield learning, or test cost reduction.

• Familiarity with DFT verification, reliability screening, or test correlation methodologies.

• Experience with Python, SQL, JMP, or data / ML tools.

• Demonstrated ability to independently drive complex technical problems from concept through execution.

Career Growth & Impact

• Direct ownership of probe strategy and quality outcomes across the product lifecycle.

• Exposure to advanced technology nodes, customer‑driven requirements, and large‑scale manufacturing systems.

• Clear growth paths across senior technical contributor, product leadership, or people management tracks within STPG Product Engineering.

Job Summary

An opportunity for Head of Software Engineering to drive the design, implementation and delivery of one or more applications ensuring efficient, consistent and compliance execution of technology modernize systems / solutions. 

Ideal candidate should have technical knowledge and skills in system architecture and solutioning, technology deployment and operations to ensure technology platforms and solutions adhere to architecture standards for innovative initiatives as well as to drive high-impact modernization projects.

Mandatory Skill-set

• Degree in Information Technology, Computer Engineering, Computer Science or Information System;
• Minimum 10 years of experience in multi-squad development with a strong technical know-how to deliver hign-impact mdoenisaton projects;
• Minimum 8 years of design and implementation experience in Enterprise Architecture Governance, Solution Architect, Distributed Applications, and Service Oriented Architectures ( SOA ) Frameworks;
• Experience in designing, developing and deploying large, scalable production applications on Cloud / PaaS platforms and Containers (such as AWS, Google and Azure);
• Experience in modern full-stack web application technologies; experience in modern front-end engineering like Next.Js/React.js and Java/TypeScript on the backend;
• Experience in overall governance of IT solutions, framework, policies, processes, and rules that ensure effective, consistent, and compliant execution of technology solutions;
• Proficient in conceptualizing and deriving common architectural designs across multiple services;
• Highly conversant in architectural concepts, principles and SOA governance practice;
• Solid Agile development experience and has experience architecting large enterprise-wide systems;
• Strong stakeholder management skills with the ability to communicate architecture methods, concepts, standards and policies;
• Customer-centric individual, possess strong leadership and interpersonal skills;
• Excellent communication and interpersonal skills, and able to work well with cross-organizational teams.

Desired Skill-set

• Certified in TOGAF / ITIL / COBIT.

Responsibilities

• Advise and lead project team’s engineering vision, strategy, and directions that align with the organization’s overall vision and goals;
• Conceptualize, Architect, Design Digital Solutions & Research on current state, identify the gaps and map out the to-be state and roadmap for both greenfield and brownfield implementations;
• As a lead architect - establish a long-term technical plan and roadmap for the project teams;
• Ensure regular administration of architecture review including facilitation of resolution of feedback, tracking and follow up for effective closure of design gap;
• Provide direction and guidance to team members in establishing architecture policies, standards, processes and platform to drive scalability and proposed changes where required;
• Partner with cross-functional teams to develop quality, reliability, and security strategies solutions;
• Guide application operations, propose new solution methodologies and mentor the team raising the collective technical competencies;
• Ensure collaboration to maintain up-to-date architecture and solution artefacts as well as communication materials for stakeholders, technology forums, and community engagements.

Should you be interested in this career opportunity, please send in your updated resume to apply@sciente.com at the earliest.

When you apply, you voluntarily consent to the disclosure, collection and use of your personal data for employment/recruitment and related purposes in accordance with the SCIENTE Group Privacy Policy, a copy of which is published at SCIENTE’s website (https://www.sciente.com/privacy-policy).

Confidentiality is assured, and only shortlisted candidates will be notified for interviews.

EA Licence No. 07C5639

The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM).

This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements.

The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle.

Key Responsibilities

Probe Coverage Strategy & Ownership

• Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands.

• Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives are met without unnecessary test overhead.

• Establish probe limits and guard‑bands based on silicon characterization, design intent, and customer specifications, with clear alignment to downstream test.

• Lead probe enablement for new product introductions (NPI) and technology ramps, identifying coverage and manufacturability risks early and driving mitigation plans.

Pre‑Silicon Design‑to‑Probe Staging & DFT Readiness

• Partner with Design, DFT, and DV teams during pre‑silicon phases to drive effective design‑to‑probe staging.

• Review and influence DFT architecture, test hooks, observability, redundancy, and trim structures to enable efficient and manufacturable probe coverage.

• Participate in pre‑silicon verification and simulation reviews to reduce first‑silicon debug risk.

• Define probe coverage intent early and ensure continuity from design features through probe and downstream test (shift‑left learning).

First Silicon Bring‑Up & Device Characterization

• Support first‑silicon bring‑up using engineering probe platforms and lab‑based characterization setups.

• Perform silicon and device‑level characterization (parametric behavior, margins, trims, stress response) to inform probe limits and screening strategy.

• Correlate early silicon behavior with probe results to validate coverage intent, identify gaps, and eliminate redundant content.

• Provide early silicon learning to accelerate probe flow stabilization and yield ramp.

Yield, Quality & Reliability Enablement

• Drive wafer‑level yield learning, bin definitions, and failure‑mode analysis at probe.

• Enable intrinsic and extrinsic screening strategies in collaboration with Reliability teams.

• Provide structured, data‑backed feedback to Fab, Process Integration, Design, and DV teams to close learning loops efficiently.

Test Efficiency & Cost Optimization

• Drive test efficiency improvements through coverage right‑sizing and flow optimization, aligned to product and market needs.

• Support wafer‑level speed (WLS) activities as part of broader probe optimization efforts.

• Balance coverage, yield, quality, and cost trade‑offs using silicon data and product risk understanding.

Data, Analytics & AI Enablement

• Leverage probe, inline, and reliability data for yield analysis, anomaly detection, and decision support.

• Contribute to AI/ML initiatives such as predictive probe, smart sampling, and test optimization.

• Apply data‑driven insights to continuously improve probe effectiveness and efficiency.

Artificial Intelligence

• Using, applying, and leveraging AI, identify opportunities to streamline workflows, optimize processes, and support innovation by incorporating AI-driven solutions and enabling data-driven decision-making across projects and teams

Experience Level & Entry Consideration

This role is open to both early‑career and experienced engineers, with leveling (GJS) aligned to technical depth, scope of ownership, and demonstrated impact.

• Fresh Bachelor’s/Master’s / PhD Graduates

• Strong fundamentals in semiconductor devices, circuits, physics, or process technology.

• Academic, research, or internship exposure to silicon behavior, characterization, variability, reliability, or design analysis.

• Will grow into full probe ownership with mentorship, focusing on device, design, and process understanding.

• Experienced Engineers (Eligible for Higher GJS)

• Prior experience in product engineering, device engineering, process integration, silicon characterization, or design‑facing roles.

• Demonstrated ownership of first‑silicon learning, qualification strategy, yield mechanisms, or cross‑functional technical trade‑offs.

• Comfortable influencing upstream and downstream teams through technical insight and silicon‑based decision‑making.

Required Qualifications

• Bachelor’s, Master’s degree, or Phd in Electrical / Electronics Engineering, Computer Engineering (with strong hardware, circuits, or semiconductor focus), Semiconductor Physics, or related field.

• Strong fundamentals in semiconductor devices, wafer test, and product engineering.

• Demonstrated ability to use silicon behavior and characterization data to make informed probe, yield, and coverage decisions.

• Experience or strong interest in silicon learning, device behavior, yield mechanisms, DFT intent, or design‑to‑manufacturing integration.

• Strong analytical skills and ability to drive structured root‑cause analysis.

• Effective communication skills and ability to work across global, cross‑functional teams.

Preferred Qualifications

• Experience with NAND / memory products.

• Experience working directly with Design, Process Integration, or Device teams to resolve silicon or product issues.

• Exposure to probe flow optimization, yield learning, or test cost reduction.

• Familiarity with DFT verification, reliability screening, or test correlation methodologies.

• Experience with Python, SQL, JMP, or data / ML tools.

• Demonstrated ability to independently drive complex technical problems from concept through execution.

Career Growth & Impact

• Direct ownership of probe strategy and quality outcomes across the product lifecycle.

• Exposure to advanced technology nodes, customer‑driven requirements, and large‑scale manufacturing systems.

• Clear growth paths across senior technical contributor, product leadership, or people management tracks within STPG Product Engineering.

Product area

At Google we work hard to earn our users’ trust every day. Trust & Safety is Google’s team of abuse fighting and user trust experts working daily to make the internet a safer place. We partner with teams across Google to deliver bold solutions in abuse areas such as malware, spam and account hijacking. A team of Analysts, Policy Specialists, Engineers, and Program Managers, we work to reduce risk and fight abuse across all of Google’s products, protecting our users, advertisers, and publishers across the globe in over 40 languages.

Job description

Trust & Safety team members are tasked with identifying and taking on the biggest problems that challenge the safety and integrity of our products. They use technical know-how, excellent problem-solving skills, user insights, and proactive communication to protect users and our partners from abuse across Google products like Search, Maps, Gmail, and Google Ads. On this team, you're a big-picture thinker and strategic team-player with a passion for doing what’s right. You work globally and cross-functionally with Google engineers and product managers to identify and fight abuse and fraud cases at Google speed - with urgency. And you take pride in knowing that every day you are working hard to promote trust in Google and ensuring the highest levels of user safety.

Additional job description

As a Workspace Trust and Safety Engineering Analyst, you will develop insights on abuse trends and establish a foundation for managing various Trust and Safety escalations across Workspace. This role is crucial in streamlining related processes and ensuring a safer Workspace experience for all users (both consumers and Workspace enterprises). You will be a partner to bring together teams to address the most critical abuse problems impacting our users. You will identify, quantify, and help address the problems and work across Google and the broader industry.

Qualifications

Job responsibilities

• Extract, transform, and analyze Google Workspace log data using advanced analytical methods to solve abuse challenges, investigate escalations to uncover vulnerabilities and tactics used by bad actors.
• Lead comprehensive analyses to deliver insights on abuse trends, directly contributing to the design and improvement of anti-abuse product protections.
• Partner with Engineering, Product Managers (PMs), Program Managers (PgMs), Data Scientists, and external groups to qualify, quantify, and understand complex abuse challenges while co-developing company-wide counter-abuse strategies and improvements.
• Establish foundational frameworks to streamline Workspace Trust and Safety escalations, and quantify the impact of anti-abuse teams to build internal and external awareness of best practices.

Minimum qualifications

• Bachelor's degree or equivalent practical experience.
• 2 years of experience in data analysis, including identifying trends, generating summary statistics, and drawing insights from quantitative and qualitative data.
• 2 years of experience managing projects and defining project scope, goals, and deliverables.
• 2 years of experience in manipulating data sets using SQL or other programming or scripting languages.

Preferred qualifications

• Master's degree in a quantitative discipline.
• 2 years of experience with one or more of the following languages: SQL, R, Python, or C++.
• 2 years of experience with machine learning systems.
• Excellent written and verbal communication skills.
• Excellent problem-solving and critical thinking skills with attention to detail in an ever-changing environment.

Network Engineering Lead (Attractive Bonus/ Central/ Permanent Role)

Responsibility:

• Lead the implementation and administration of multi-vendor network environments, including switches, routers, firewalls, load balancers, and DNS appliances.
• Design, deploy, and support LAN/WAN infrastructure, including SD-WAN, MPLS, VPNs, and ISP connectivity.
• Collaborate with stakeholders to develop network solutions supporting infrastructure, voice, desktop, and video services.
• Ensure network changes comply with change management policies and procedures.
• Develop network proof-of-concepts (POCs) and provide technical guidance to implementation teams.
• Manage network hardware and software lifecycle, including technology refresh initiatives.
• Maintain network documentation, standards, and operational processes.
• Mentor team members and participate in a 24/7 on-call support rotation.

Requirement:

• Bachelor’s Degree Computer science/ Computer Engineering/ Information Security or related certifications.
• Minimum 4 years of network engineering experience in medium to large enterprise environments.
• CCNP certification preferred; Check Point or Palo Alto certifications are advantageous.
• Strong knowledge of LAN/WAN technologies, routing and switching, VPNs, DNS, DHCP, OSPF, BGP, ACLs, NAT, IPv6, and load balancing.
• Hands-on experience with Cisco ACI, Cisco Nexus/Catalyst, and Check Point, Palo Alto, or Fortinet firewalls.
• Solid understanding of infrastructure operations, monitoring, and change/configuration management.
• Experience implementing large-scale network solutions; payments or financial services industry experience is an advantage.

How to apply

Interested candidates who wish to apply for the post, you may click the Apply Now Button or send in your updated resume (in MS Word format) to jackyooi@careerally.com.sg

We regret to inform that only shortlisted candidates will be notified.

Careerally Pte Ltd | EA Licence: 24C2215

Ooi Chuan Yi (Jacky)| EA Registration No: R24122948

CCTV Technician x 2

• Salary: $ 2,450 - $ 3,200
• Address: 3 Bus stop from Tiong Bahru MRT
• Working Hours: Monday - Friday / 8.45am to 6pm
• Alternate Saturday / 8.45am to 1.15pm

 
Job Requirements:

• ITE / Diploma graduate
• Class 3 (Manual or Auto) License

 Job Description:

• Technical knowledge for cabling & tracing work (UTP)  
• Skillset in CCTV / Door Access / Telephony / WIFI setup
• Able to handle customer / basic project coordination
• Basic Programming / IT for above product in item 3 added advantages
• Ad-hoc duties as per assign
   

Interested applicants kindly submit your resume through here or Whatsapp +65 9019 3218 (Joevy), and allow our Consultant to match you with our Clients. No Charges will be incurred by Candidates for any service rendered.

Tan Yu Jing Reg No: R26161199

The Supreme HR Advisory Pte Ltd EA No: 14C7279

Responsibilities

·      Review design package and prepare/ approve shop drawing of RC structural works and temporary works (strut, waler, etc.)

·      Coordination of structural design works with design-relevant counter parties (i.e. civil consultant, accredited checker, and Arch/SWC consultant) and construction team, as well as authorities if necessary

·      Design of temporary works (e.g. scaffolding, false work, form work etc.) related to structural design

·      Lead/ Assist project department in solving design related matters

·      Manage and resolve production, quality, design, engineering and scheduling issue

·      Other duties as required

Requirements

·      Min. 5 yrs engineering experience in civil &structural works

·       Experience in infrastructure projects is mandatory (Land Transport Project preferrable)

·      Site experience in underground roadway project is preferred

·      Design management with consultancy on structural engineering is highly advantageous

·      Proficient knowledge of structural design, analysis software such as STADD and AutoCAD (or Microstation)

·      Good knowledge of authorities’ requirement

To findout more about this opportunity, please contact Lionel Liew at lionel.liew@gmprecruit.com.

We regret that only shortlisted candidates will be notified.

GMP Technologies (S) Pte Ltd  |   EA Licence: 11C3793|   EA Personnel: Lionel Liew   |  Registration No: R1330693

Company Overview

Aeta Engineering Pte Ltd is led by senior personnel with over 40 years of combined experience. We provide turnkey M&E engineering solutions focused on semiconductors, electronics, data centers, pharmaceuticals, food, and fragrance industries, driven by innovation and sustainability.

Job Summary

Supervise on-site Mechanical & Electrical installation projects, ensuring compliance with client requirements, safety standards, and project specifications while coordinating with stakeholders to deliver quality engineering solutions.

Responsibilities

• Supervise on-site Mechanical & Electrical installation projects to ensure adherence to project specifications and quality standards
• Collaborate with Project Manager/Engineer to prepare Work Method Statements, Risk Assessments, and related client documentation
• Interpret Mechanical and Electrical schematic drawings to guide installation and troubleshooting activities
• Analyze and apply client requirements to plan and execute site works effectively
• Prepare and submit project-related documents to clients accurately and timely
• Coordinate and liaise with subcontractors, suppliers, vendors, and clients to ensure smooth project execution
• Monitor installation progress and prepare detailed weekly and monthly progress reports
• Enforce site safety protocols and ensure compliance with all safety regulations
• Compile and prepare testing documentation as requested by Project Manager or Engineer for project scope verification
• Perform additional duties assigned by superiors to support project delivery

Job Description

• Industry/ Organization Type: Construction
• Position Title: Technical Engineer
• Working Location: Boon Lay
• Working Hours: 5 days (Mon – Fri, 9.00am – 6.30pm)
• Salary Package: Basic salary up to $4,500 + Variable Bonus
• Duration: 2-years Contract (Convertible to Permanent)

Key Responsibilities

• Prepare technical reports, design calculations, and specifications
• Create 2D and 3D drawings as needed
• Plan and oversee engineering projects
• Conduct feasibility studies and technical assessments, including site investigations
• Carry out site inspections and investigations as required
• Coordinate and communicate with clients, authorities, architects, engineers, contractors, and suppliers to resolve design and development issues
• Conduct research and gather data for projects and Capstone initiatives
• Ensure project compliance with current codes of practice and legal requirements
• Attend training courses provided by the company

APPLY NOW!!!

• Bachelor’s degree in civil & structural engineering, or relevant discipline
• Recognised qualification by the Professional Engineers Board Singapore (PEB) preferred
• Experience in restoration, civil or structural engineering design, or project management is an advantage
• Proficient in Microsoft Office and engineering design software
• Able to perform engineering hand calculations to relevant codes (BS/EC)
• Experience with CAD or BIM is preferred
• Willing to travel as required

Kindly apply through ANY of the following methods:

• Submit your application by clicking the APPLY button;
• Email your resume to Job@anradus.com.sg. Please indicate #65005 on the email subject.

Anradus Application Policy: We value each application and ensure every resume is reviewed. Our process is efficient, typically concluding within 3 working days. If you do not receive communication from us within this timeframe, it's likely that your application has not been shortlisted by our client. In such cases, we recommend continuing your job search to maximize your opportunities.

Anradus Pte Ltd | EA License No. 20C0161 | Angel Lim | EA Reg No.: R1769781

JOB DUTIES AND RESPONSIBILITIES

1. Perform painting works throughout the hotel, including guestroom, public areas, back-of-house spaces and facilities, to maintain the property’s appearance and standards.
2. Prepare surfaces for painting by cleaning, scraping, patching, sanding, and priming as required.
3. Apply paint, vanish, stains, and other protective coatings to plaster walls, ceiling, wooden surfaces, metalwork, and fixtures using appropriate tools and techniques.
4. Carry out touch-up painting and minor surface repairs to maintain the hotel’s aesthetic standards.
5. Ensure all painting works are completed safely, neatly, and in accordance with the hotel quality standards and workplace safety requirement.
6. Maintain painting tools, equipment, and materials in good working condition and ensure proper storage of paint and chemicals. 
7. Any other duties as may be assigned from time to time. 

JOB REQUIREMENTS

• Minimum qualification of GCE 'N' level
• Ability to multitask and prioritize tasks effectively. 
• Able to start work within short notice period.

Job Description

• Industry/ Organization Type: Wholesale of Marine Equipment and Accessories
• Position Title: Sales Engineer (Marine Engineering)
• Working Location: Tuas West Road (8 minutes walking distance from the MRT)
• Working Hours: Monday – Friday, 9AM – 5:30PM (One Saturday per month, 9AM – 12PM)
• Salary Package: Up to $3,800 + Variable Bonus + Medical Benefits
• Duration: Permanent

Key Responsibilities

• Prepare and deliver technical presentations to customers, explaining products and services clearly.
• Coordinate with customers and the operations team to assess service job requirements.
• Work with administrative staff to arrange engineer deployment.
• Manage order securing, renewal processes, and oversee overseas delivery/logistics.
• Collaborate with sales teams to understand customer needs and provide appropriate sales or technical support.
• Perform other ad-hoc duties as assigned by the department head.

APPLY NOW!!!

• Diploma/ Bachelor’s degree or higher in Marine Engineering or a relevant field.
• At least 1 year of experience in the marine industry.
• Strong technical knowledge of marine engines and spare parts.
• Excellent communication and interpersonal skills with the ability to build client relationships quickly.
• Analytical and problem-solving mindset.
• Mature, independent, and team-oriented with a positive work attitude.
• Hands-on, proactive, and willing to take initiative.
• Willingness to travel as required.

Kindly apply through ANY of the following methods:

• Submit your application by clicking the APPLY button;
• Email your resume to Job@anradus.com.sg. Please indicate #70837 on the email subject.

Anradus Application Policy: We value each application and ensure every resume is reviewed. Our process is efficient, typically concluding within 3 working days. If you do not receive communication from us within this timeframe, it's likely that your application has not been shortlisted by our client. In such cases, we recommend continuing your job search to maximize your opportunities.

Anradus Pte Ltd | EA License No. 20C0161 | Angel Lim | EA Reg No.: R1769781

Job Description：

• Manage and maintain all controlled company documents. Update and control procedure documents and forms.
• Create and manage document hierarchy and process systems
• Take charge of all document identification and filing
• Frequently conduct document audits confirming they are current and accurately reflect recorded evidence
• Ensure revised documents are accessible
• Assist with communication during external audits
• Oversee document through its entire lifecycle (inception to archival)
• Check and edit incoming documents and prepare for distribution per project requirement
• Maintain document filing and organizing systems that are both effective and efficient
• Ensure proper organization and security of documents (paper and electronic)
• Log document requests and help retrieve documents as needed for employees
• Confirm delivery of documents to proper personnel
• Collaborate and communicate with managers and project leaders
• Copying information from one record to another.
• Copies data and compiles records.

Requirements：

• Bachelor's degree credits approved in Business Administration, or related
• 5+ years of relevant experience
• Proficient in SharePoint, Word, Excel, Outlook and/or other document management software and web-based tools.
• Detail-oriented
• Expert data organizer
• Strong oral and written communication
• Organized
• Collaboration & Teamwork
• Accountability

Job Purpose

Intercontinental Exchange, Inc. (ICE) offers a unique opportunity to work on cutting-edge technology and complex business challenges in the financial sector. The Senior Network Engineer role within the ICE Network Engineering team provides technical leadership across network design, validation, deployment, maintenance, and operational support.

The successful candidate will help advance one of the world’s largest global financial networks, supporting a broad portfolio of mission-critical services. This role requires the ability to thrive in a dynamic, team-based global environment, demonstrating strong problem-solving, sound decision-making, and a high degree of professionalism.

Responsibilities

• Design, configure, and implement complex Juniper- and Arista-based data centre and WAN solutions that support real-time market data and multicast services, with an emphasis on ultra-low latency, resilience, and reliability.
• Collaborate with cross-functional teams to gather business and technical requirements and translate them into scalable, effective network designs.
• Support and maintain a range of multi-vendor production network environments that are critical to business operations.
• Develop and maintain high-quality network documentation, including diagrams, configurations, standards, and operating procedures.
• Provide expert-level troubleshooting and escalation support for network incidents and outages, restoring service quickly and minimizing operational impact.
• Stay current with industry trends, emerging technologies, and best practices related to WAN, data centre, and low-latency network engineering.
• Understand and follow ICE operational policies and procedures and actively promote adherence to them across day-to-day engineering activities.
• Provide the technical expertise required to ensure network changes are planned, validated, and executed safely, effectively, and efficiently.
• Work closely with vendors, service providers, and internal technology teams to deliver seamless, high-performance network solutions.

Knowledge and Experience

• Bachelor’s degree in computer science, Information Technology, or a related field.
• Must hold a current Juniper and/or Cisco professional-level certification.
• 7+ years of networking experience, including at least 5 years designing, configuring, and implementing complex Juniper-based global MPLS WAN networks.
• In-depth knowledge of WAN protocols and technologies, including BGP, IS-IS, OSPF, MPLS, VPLS, VPNs, and QoS.
• Extensive knowledge of two or more network operating systems or platforms, including Junos, IOS/NX-OS, EOS, or F5 LTM/GTM.
• Extensive knowledge of Check Point FW-1, Palo Alto, or similar stateful packet inspection firewalls.
• Deep understanding of TCP/IP, NAT, route maps, access control lists, and routing policies.
• Extensive hands-on experience with Juniper networking products, including Junos OS, MX Series routers, EX/QFX Series switches, and SRX Series firewalls.
• Extensive knowledge of multicast network design and troubleshooting, including IGMP and PIM protocols.
• Demonstrated ability to distinguish between critical business-impacting incidents and minor issues, and to resolve or escalate them appropriately.
• Understanding of low-latency network design principles, clock synchronization, and Precision Time Protocol (PTP) implementations.
• Strong knowledge of Python and experience using it for network automation and operational efficiency.
• Strong knowledge of modern configuration management and automation tools, including Ansible, Jinja, and JSON.
• Experience with network monitoring and management tools, together with strong packet capture and analysis skills.
• Thorough understanding of Linux shell commands and experience with network automation tools and frameworks.
• Ability to adapt to a fast-paced, evolving global environment while staying current with advancements in networking technology.

Personal Attributes

• Strong verbal and written communication skills, with a customer-focused approach.
• Self-motivated, with the ability to work independently and take ownership of outcomes.
• Able to manage multiple priorities and work effectively across concurrent projects.
• Professional, collaborative, and service-oriented in approach.

Schedule

• This role is office-based, with attendance required five days per week.
• Some weekend and after-hours work will be required to support operational and change activities

• Manage project activities to ensure timely execution across development phases.
• Coordinate cross-functional teams across engineering, manufacturing, and supply chain to drive project execution and timely delivery.
• Manage project timelines, risks, budgets, and technical reviews to ensure successful delivery.
• Drive product validation and readiness activities to ensure smooth transition into production.

Requirements:

• Degree in Mechanical Engineering or equivalent
• At least 3 years of experience in project management or equipment/engineering environment.
• Exposure to equipment engineering and build processes.
• Basic understanding of costing and budgeting.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to hr@recruit-expert.com

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R21100996

Interested applicants are invited to apply directly at the NUS Career Portal. Please note your application will only be processed if you apply via NUS Career Portal.

NUS Career Portal link: https://careers.nus.edu.sg/job/Research-Fellow-%28Quantum-Engineering%29/33413-en_GB/

We regret that only shortlisted candidates will be notified.

Job Description

We are seeking a highly motivated Research Fellow to join our growing team developing next-generation electrical interfaces to diamond quantum sensors based on nitrogen-vacancy (NV) centers. The successful candidate will lead efforts to develop novel electrical readout, control, and sensing architectures that complement or potentially replace conventional optical detection methods.

The research will combine semiconductor device physics, quantum sensing, spin-dependent transport, and diamond electronics, with opportunities to explore hybrid platforms involving two-dimensional materials, field-effect devices, and advanced electrical detection techniques.

Key Responsibilities

•    Electrical interfaces for diamond quantum systems: Lead efforts to develop and optimize electrical approaches for detecting and controlling NV-center spin and charge states, including device design, fabrication, and characterization.
•    Semiconductor device architectures: Explore p-i-n, Schottky, field-effect, and related device structures for integrating diamond defects with electrical readout and control platforms.
•    Spin-dependent transport and recombination: Investigate spin-dependent electrical, optical, and recombination processes in diamond and related defect systems for quantum sensing applications.
•    Diamond–hybrid devices: Develop hybrid device architectures incorporating diamond with novel and/or CMOS-compatible materials, including graphene, silicon nitride, or other functional layers for electrical transduction.
•    Device modelling and simulation: Model carrier transport, charge-state dynamics, photoelectric processes, recombination pathways, and electrostatic device behaviour to guide experiments and optimize device performance.
•    Team collaboration and mentorship: Work closely with PhD students, research engineers, and undergraduate researchers while contributing to the growth of a multidisciplinary research programme.
•    Cross-disciplinary exploration: Engage with applications spanning quantum sensing, integrated electronics, semiconductor diagnostics, quantum materials, and bioelectronic sensing.

What We Offer
•    Opportunity to pioneer new approaches to electrical quantum sensing and spin-based technologies in diamond.
•    Access to state-of-the-art facilities for diamond characterization, device fabrication, optics, microwave engineering, and electrical measurements.
•    Freedom to pursue ambitious and innovative research directions at the intersection of quantum technology, semiconductor electronics, and advanced sensing.
•    Participation in building a new research programme from the ground up, with significant opportunities for intellectual leadership, technology development, and independent project ownership.
•    Strong emphasis on translation beyond academic publications, including the development of enabling technologies, prototype systems, intellectual property, and real-world sensing applications.
•    Opportunities to contribute to patent generation, technology commercialization, industry partnerships, and potential future spin-out ventures arising from the research.
•    Exposure to a broad range of application areas, including semiconductor diagnostics, advanced manufacturing, quantum instrumentation, materials characterization, healthcare technologies, and next-generation sensing systems.
•    Collaboration with experts across quantum sensing, nanofabrication, semiconductor devices, materials science, photonics, and engineering.
•    Strong support for publishing impactful research while simultaneously pursuing technologies that can deliver tangible scientific, industrial, and societal benefits.

Job Requirements

Job Requirements
•    PhD in Physics, Electrical Engineering, Materials Science, Applied Physics, or a closely related field.
•    Strong background in one or more of the following:
     o   Semiconductor device physics
     o   Quantum sensing or spin physics
     o   Diamond defects and color centers
     o   Electronic transport measurements
     o   Semiconductor characterization techniques
•    Experience with electrical device fabrication and characterization, including Schottky diodes, p-i-n structures, FETs, or related semiconductor devices.
•    Familiarity with low-noise electrical measurements, RF electronics, lock-in techniques, impedance spectroscopy, capacitance measurements, or microwave spin-resonance methods.
•    Experience with carrier transport simulations, semiconductor modelling, finite-element analysis, or device design tools is advantageous.
•    Knowledge of NV centers, spin-dependent recombination, charge-state physics, PDMR, ODMR, or related quantum defect systems is desirable but not strictly required.
•    Experience with graphene, hBN, other two-dimensional materials, or hybrid quantum-semiconductor devices would be highly advantageous.
•    Strong publication record, scientific communication skills, and ability to work independently while contributing effectively within a collaborative team.
•    Open to Fixed Term Contract.

We are looking to speak to Software Engineering Managers!

Key Responsibilities

• Lead, mentor, and develop a team of software engineers, fostering a culture of collaboration, innovation, and continuous improvement.
• Drive technical design, architecture discussions, and implementation strategies for scalable and resilient applications.
• Oversee the end-to-end software development lifecycle, from planning and design to deployment and support.
• Partner with Product Managers, Architects, and cross-functional teams to define technical roadmaps and deliver business objectives.
• Establish engineering best practices, coding standards, CI/CD processes, and quality assurance frameworks.
• Ensure high system availability, performance, security, and scalability across cloud-based applications.
• Manage team capacity, sprint planning, resource allocation, and delivery commitments.
• Conduct performance reviews, career development planning, and coaching for team members.
• Participate in technical decision-making, code reviews, and architecture governance.
• Drive cloud adoption and modernization initiatives leveraging AWS services.
• Monitor project risks and proactively address technical and operational challenges.

Required Qualifications

• Bachelor's or Master's degree in Computer Science, Software Engineering, or a related field.
• 8+ years of software development experience with at least 3+ years in an engineering leadership or management role.
• Strong hands-on experience with: Golang, Java, ReactJs, AWS
• Experience designing and building microservices-based architectures.
• Strong understanding of distributed systems, APIs, event-driven architectures, and cloud-native development.
• Experience with Agile/Scrum methodologies and modern engineering practices.
• Proven ability to lead multiple engineering initiatives simultaneously.
• Excellent stakeholder management, communication, and leadership skills.

EA Registration No: R21101138

"Sanderson-iKas" is the brand name for iKas International (Asia) Pte Ltd, a company incorporated in Singapore under Company UEN No.: 200914065E with EA license number 16S8086.

Website: www.sanderson-ikas.sg

Company Overview

HOYA Electronics focuses on developing optical and extreme ultraviolet (EUV) photomask blanks essential for manufacturing advanced chips used in AI, high-performance computing, 5G, memory, logic, and power devices.

Job Summary

The Application Engineering Technician supports engineers to ensure customer satisfaction, product compliance, and timely resolution of quality issues by collaborating across departments and assisting with new product launches and customer concerns.

Responsibilities

• Receive and accurately log customer complaints to maintain complete records for quality tracking
• Support daily customer quality operations by managing feedback and inquiries promptly
• Assist engineers in performing initial containment actions such as identifying risky products and coordinating rework
• Collaborate with Application Engineering and Quality Assurance Engineers to support root cause investigations
• Prepare 8D reports and document corrective and preventive actions to address quality issues
• Follow up on open quality issues to ensure timely resolution and closure
• Assist in preparing customer quality reports, including defect trends and statistical process control (SPC) data
• Monitor quality trends and report non-conformances to engineers for further action
• Support engineers during customer visits by preparing and delivering required data and samples
• Coordinate testing and assessment of engineering samples to support product evaluation

Required competencies and certifications

• NITEC or Diploma in any Engineering field, or equivalent
• Ability to work in a cleanroom environment and perform overtime as needed

Preferred competencies and qualifications

• 1 to 2 years of relevant semiconductor industry experience or related roles
• Proficiency in Microsoft Office, specifically Excel, to manage data and reports
• Basic knowledge of statistical or quality tools for quality analysis
• Experience in quality documentation and organized record keeping
• Strong communication skills to effectively collaborate with cross-functional teams
• Problem-solving skills to support investigations and corrective actions
• Ability to work independently and as part of a team

Other Information

• Office hour position
• Able to work in a cleanroom environment and perform overtime as and when necessary

HOYA Electronics Singapore Pte Ltd is an equal opportunity employer committed to diversity and inclusion. We do not charge candidates any recruitment fees or unlawful payments for employment consideration.

The Test Engineering Engineer will be responsible for developing, implementing, and maintaining test systems and strategies to support manufacturing operations and new product introduction (NPI). This role ensures product quality, reliability, and compliance with customer and industry standards while driving continuous improvement in test processes.

Job Duties:

Test System Development & Maintenance

• Design, develop, and maintain automated and manual test systems for production.
• Ensure test equipment and fixtures are calibrated, reliable, and compliant with standards.
• Troubleshoot and resolve test-related issues to minimize downtime.

Manufacturing Support

• Provide technical support to production teams on test processes and equipment.
• Analyze test data to identify root causes of failures and recommend corrective actions.
• Collaborate with Quality and Manufacturing teams to ensure smooth operations.

New Product Introduction (NPI)

• Work with R&D and design teams to define test requirements for new products.
• Develop test plans, procedures, and documentation for NPI projects.
• Support pilot builds and validate test systems before mass production.

Continuous Improvement

• Drive initiatives to improve test coverage, efficiency, and cycle time.
• Implement lean and Six Sigma methodologies in test engineering processes.
• Introduce new technologies and automation to enhance test capabilities.

Compliance & Documentation

• Ensure test processes comply with industry standards and customer requirements.
• Maintain accurate documentation of test procedures, results, and system configurations.
• Support audits and certification processes related to testing.

Qualifications:

• Bachelor’s degree in Electrical Engineering, Electronics, Computer Engineering, or related field.
• Experience in test engineering within manufacturing or product development environments.
• Knowledge of test equipment (oscilloscopes, ICT, functional testers) and automation tools.
• Strong analytical and problem-solving skills.
• Excellent communication and teamwork abilities.

Preferred Skills

• Experience with LabVIEW, TestStand, Python, C# or similar test automation platforms.
• Ability to design, build, and maintain test fixtures, jigs, and automated test equipment.
• Knowledge of statistical analysis tools for test data (Minitab, JMP).
• Understanding of NPI processes, validation, and qualification testing.