Total 12 Senior Executive level Manufacturing / Production job vacancies

The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM).

This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements.

The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle.

Key Responsibilities

Probe Coverage Strategy & Ownership

• Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands.

• Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives are met without unnecessary test overhead.

• Establish probe limits and guard‑bands based on silicon characterization, design intent, and customer specifications, with clear alignment to downstream test.

• Lead probe enablement for new product introductions (NPI) and technology ramps, identifying coverage and manufacturability risks early and driving mitigation plans.

Pre‑Silicon Design‑to‑Probe Staging & DFT Readiness

• Partner with Design, DFT, and DV teams during pre‑silicon phases to drive effective design‑to‑probe staging.

• Review and influence DFT architecture, test hooks, observability, redundancy, and trim structures to enable efficient and manufacturable probe coverage.

• Participate in pre‑silicon verification and simulation reviews to reduce first‑silicon debug risk.

• Define probe coverage intent early and ensure continuity from design features through probe and downstream test (shift‑left learning).

First Silicon Bring‑Up & Device Characterization

• Support first‑silicon bring‑up using engineering probe platforms and lab‑based characterization setups.

• Perform silicon and device‑level characterization (parametric behavior, margins, trims, stress response) to inform probe limits and screening strategy.

• Correlate early silicon behavior with probe results to validate coverage intent, identify gaps, and eliminate redundant content.

• Provide early silicon learning to accelerate probe flow stabilization and yield ramp.

Yield, Quality & Reliability Enablement

• Drive wafer‑level yield learning, bin definitions, and failure‑mode analysis at probe.

• Enable intrinsic and extrinsic screening strategies in collaboration with Reliability teams.

• Provide structured, data‑backed feedback to Fab, Process Integration, Design, and DV teams to close learning loops efficiently.

Test Efficiency & Cost Optimization

• Drive test efficiency improvements through coverage right‑sizing and flow optimization, aligned to product and market needs.

• Support wafer‑level speed (WLS) activities as part of broader probe optimization efforts.

• Balance coverage, yield, quality, and cost trade‑offs using silicon data and product risk understanding.

Data, Analytics & AI Enablement

• Leverage probe, inline, and reliability data for yield analysis, anomaly detection, and decision support.

• Contribute to AI/ML initiatives such as predictive probe, smart sampling, and test optimization.

• Apply data‑driven insights to continuously improve probe effectiveness and efficiency.

Artificial Intelligence

• Using, applying, and leveraging AI, identify opportunities to streamline workflows, optimize processes, and support innovation by incorporating AI-driven solutions and enabling data-driven decision-making across projects and teams

Experience Level & Entry Consideration

This role is open to both early‑career and experienced engineers, with leveling (GJS) aligned to technical depth, scope of ownership, and demonstrated impact.

• Fresh Bachelor’s/Master’s / PhD Graduates

• Strong fundamentals in semiconductor devices, circuits, physics, or process technology.

• Academic, research, or internship exposure to silicon behavior, characterization, variability, reliability, or design analysis.

• Will grow into full probe ownership with mentorship, focusing on device, design, and process understanding.

• Experienced Engineers (Eligible for Higher GJS)

• Prior experience in product engineering, device engineering, process integration, silicon characterization, or design‑facing roles.

• Demonstrated ownership of first‑silicon learning, qualification strategy, yield mechanisms, or cross‑functional technical trade‑offs.

• Comfortable influencing upstream and downstream teams through technical insight and silicon‑based decision‑making.

Required Qualifications

• Bachelor’s, Master’s degree, or Phd in Electrical / Electronics Engineering, Computer Engineering (with strong hardware, circuits, or semiconductor focus), Semiconductor Physics, or related field.

• Strong fundamentals in semiconductor devices, wafer test, and product engineering.

• Demonstrated ability to use silicon behavior and characterization data to make informed probe, yield, and coverage decisions.

• Experience or strong interest in silicon learning, device behavior, yield mechanisms, DFT intent, or design‑to‑manufacturing integration.

• Strong analytical skills and ability to drive structured root‑cause analysis.

• Effective communication skills and ability to work across global, cross‑functional teams.

Preferred Qualifications

• Experience with NAND / memory products.

• Experience working directly with Design, Process Integration, or Device teams to resolve silicon or product issues.

• Exposure to probe flow optimization, yield learning, or test cost reduction.

• Familiarity with DFT verification, reliability screening, or test correlation methodologies.

• Experience with Python, SQL, JMP, or data / ML tools.

• Demonstrated ability to independently drive complex technical problems from concept through execution.

Career Growth & Impact

• Direct ownership of probe strategy and quality outcomes across the product lifecycle.

• Exposure to advanced technology nodes, customer‑driven requirements, and large‑scale manufacturing systems.

• Clear growth paths across senior technical contributor, product leadership, or people management tracks within STPG Product Engineering.
  

  Performs hardware, software, semiconductor design or telecomm engineering assignments. This job mapping should be used only if the position cannot be mapped specifically to other design/development engineering jobs.

The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM).

This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements.

The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle.

Key Responsibilities

Probe Coverage Strategy & Ownership

• Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands.

• Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives are met without unnecessary test overhead.

• Establish probe limits and guard‑bands based on silicon characterization, design intent, and customer specifications, with clear alignment to downstream test.

• Lead probe enablement for new product introductions (NPI) and technology ramps, identifying coverage and manufacturability risks early and driving mitigation plans.

Pre‑Silicon Design‑to‑Probe Staging & DFT Readiness

• Partner with Design, DFT, and DV teams during pre‑silicon phases to drive effective design‑to‑probe staging.

• Review and influence DFT architecture, test hooks, observability, redundancy, and trim structures to enable efficient and manufacturable probe coverage.

• Participate in pre‑silicon verification and simulation reviews to reduce first‑silicon debug risk.

• Define probe coverage intent early and ensure continuity from design features through probe and downstream test (shift‑left learning).

First Silicon Bring‑Up & Device Characterization

• Support first‑silicon bring‑up using engineering probe platforms and lab‑based characterization setups.

• Perform silicon and device‑level characterization (parametric behavior, margins, trims, stress response) to inform probe limits and screening strategy.

• Correlate early silicon behavior with probe results to validate coverage intent, identify gaps, and eliminate redundant content.

• Provide early silicon learning to accelerate probe flow stabilization and yield ramp.

Yield, Quality & Reliability Enablement

• Drive wafer‑level yield learning, bin definitions, and failure‑mode analysis at probe.

• Enable intrinsic and extrinsic screening strategies in collaboration with Reliability teams.

• Provide structured, data‑backed feedback to Fab, Process Integration, Design, and DV teams to close learning loops efficiently.

Test Efficiency & Cost Optimization

• Drive test efficiency improvements through coverage right‑sizing and flow optimization, aligned to product and market needs.

• Support wafer‑level speed (WLS) activities as part of broader probe optimization efforts.

• Balance coverage, yield, quality, and cost trade‑offs using silicon data and product risk understanding.

Data, Analytics & AI Enablement

• Leverage probe, inline, and reliability data for yield analysis, anomaly detection, and decision support.

• Contribute to AI/ML initiatives such as predictive probe, smart sampling, and test optimization.

• Apply data‑driven insights to continuously improve probe effectiveness and efficiency.

Artificial Intelligence

• Using, applying, and leveraging AI, identify opportunities to streamline workflows, optimize processes, and support innovation by incorporating AI-driven solutions and enabling data-driven decision-making across projects and teams

Experience Level & Entry Consideration

This role is open to both early‑career and experienced engineers, with leveling (GJS) aligned to technical depth, scope of ownership, and demonstrated impact.

• Fresh Bachelor’s/Master’s / PhD Graduates

• Strong fundamentals in semiconductor devices, circuits, physics, or process technology.

• Academic, research, or internship exposure to silicon behavior, characterization, variability, reliability, or design analysis.

• Will grow into full probe ownership with mentorship, focusing on device, design, and process understanding.

• Experienced Engineers (Eligible for Higher GJS)

• Prior experience in product engineering, device engineering, process integration, silicon characterization, or design‑facing roles.

• Demonstrated ownership of first‑silicon learning, qualification strategy, yield mechanisms, or cross‑functional technical trade‑offs.

• Comfortable influencing upstream and downstream teams through technical insight and silicon‑based decision‑making.

Required Qualifications

• Bachelor’s, Master’s degree, or Phd in Electrical / Electronics Engineering, Computer Engineering (with strong hardware, circuits, or semiconductor focus), Semiconductor Physics, or related field.

• Strong fundamentals in semiconductor devices, wafer test, and product engineering.

• Demonstrated ability to use silicon behavior and characterization data to make informed probe, yield, and coverage decisions.

• Experience or strong interest in silicon learning, device behavior, yield mechanisms, DFT intent, or design‑to‑manufacturing integration.

• Strong analytical skills and ability to drive structured root‑cause analysis.

• Effective communication skills and ability to work across global, cross‑functional teams.

Preferred Qualifications

• Experience with NAND / memory products.

• Experience working directly with Design, Process Integration, or Device teams to resolve silicon or product issues.

• Exposure to probe flow optimization, yield learning, or test cost reduction.

• Familiarity with DFT verification, reliability screening, or test correlation methodologies.

• Experience with Python, SQL, JMP, or data / ML tools.

• Demonstrated ability to independently drive complex technical problems from concept through execution.

Career Growth & Impact

• Direct ownership of probe strategy and quality outcomes across the product lifecycle.

• Exposure to advanced technology nodes, customer‑driven requirements, and large‑scale manufacturing systems.

• Clear growth paths across senior technical contributor, product leadership, or people management tracks within STPG Product Engineering.

The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM).

This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements.

The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle.

Key Responsibilities

Probe Coverage Strategy & Ownership

• Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands.

• Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives are met without unnecessary test overhead.

• Establish probe limits and guard‑bands based on silicon characterization, design intent, and customer specifications, with clear alignment to downstream test.

• Lead probe enablement for new product introductions (NPI) and technology ramps, identifying coverage and manufacturability risks early and driving mitigation plans.

Pre‑Silicon Design‑to‑Probe Staging & DFT Readiness

• Partner with Design, DFT, and DV teams during pre‑silicon phases to drive effective design‑to‑probe staging.

• Review and influence DFT architecture, test hooks, observability, redundancy, and trim structures to enable efficient and manufacturable probe coverage.

• Participate in pre‑silicon verification and simulation reviews to reduce first‑silicon debug risk.

• Define probe coverage intent early and ensure continuity from design features through probe and downstream test (shift‑left learning).

First Silicon Bring‑Up & Device Characterization

• Support first‑silicon bring‑up using engineering probe platforms and lab‑based characterization setups.

• Perform silicon and device‑level characterization (parametric behavior, margins, trims, stress response) to inform probe limits and screening strategy.

• Correlate early silicon behavior with probe results to validate coverage intent, identify gaps, and eliminate redundant content.

• Provide early silicon learning to accelerate probe flow stabilization and yield ramp.

Yield, Quality & Reliability Enablement

• Drive wafer‑level yield learning, bin definitions, and failure‑mode analysis at probe.

• Enable intrinsic and extrinsic screening strategies in collaboration with Reliability teams.

• Provide structured, data‑backed feedback to Fab, Process Integration, Design, and DV teams to close learning loops efficiently.

Test Efficiency & Cost Optimization

• Drive test efficiency improvements through coverage right‑sizing and flow optimization, aligned to product and market needs.

• Support wafer‑level speed (WLS) activities as part of broader probe optimization efforts.

• Balance coverage, yield, quality, and cost trade‑offs using silicon data and product risk understanding.

Data, Analytics & AI Enablement

• Leverage probe, inline, and reliability data for yield analysis, anomaly detection, and decision support.

• Contribute to AI/ML initiatives such as predictive probe, smart sampling, and test optimization.

• Apply data‑driven insights to continuously improve probe effectiveness and efficiency.

Artificial Intelligence

• Using, applying, and leveraging AI, identify opportunities to streamline workflows, optimize processes, and support innovation by incorporating AI-driven solutions and enabling data-driven decision-making across projects and teams

Experience Level & Entry Consideration

This role is open to both early‑career and experienced engineers, with leveling (GJS) aligned to technical depth, scope of ownership, and demonstrated impact.

• Fresh Bachelor’s/Master’s / PhD Graduates

• Strong fundamentals in semiconductor devices, circuits, physics, or process technology.

• Academic, research, or internship exposure to silicon behavior, characterization, variability, reliability, or design analysis.

• Will grow into full probe ownership with mentorship, focusing on device, design, and process understanding.

• Experienced Engineers (Eligible for Higher GJS)

• Prior experience in product engineering, device engineering, process integration, silicon characterization, or design‑facing roles.

• Demonstrated ownership of first‑silicon learning, qualification strategy, yield mechanisms, or cross‑functional technical trade‑offs.

• Comfortable influencing upstream and downstream teams through technical insight and silicon‑based decision‑making.

Required Qualifications

• Bachelor’s, Master’s degree, or Phd in Electrical / Electronics Engineering, Computer Engineering (with strong hardware, circuits, or semiconductor focus), Semiconductor Physics, or related field.

• Strong fundamentals in semiconductor devices, wafer test, and product engineering.

• Demonstrated ability to use silicon behavior and characterization data to make informed probe, yield, and coverage decisions.

• Experience or strong interest in silicon learning, device behavior, yield mechanisms, DFT intent, or design‑to‑manufacturing integration.

• Strong analytical skills and ability to drive structured root‑cause analysis.

• Effective communication skills and ability to work across global, cross‑functional teams.

Preferred Qualifications

• Experience with NAND / memory products.

• Experience working directly with Design, Process Integration, or Device teams to resolve silicon or product issues.

• Exposure to probe flow optimization, yield learning, or test cost reduction.

• Familiarity with DFT verification, reliability screening, or test correlation methodologies.

• Experience with Python, SQL, JMP, or data / ML tools.

• Demonstrated ability to independently drive complex technical problems from concept through execution.

Career Growth & Impact

• Direct ownership of probe strategy and quality outcomes across the product lifecycle.

• Exposure to advanced technology nodes, customer‑driven requirements, and large‑scale manufacturing systems.

• Clear growth paths across senior technical contributor, product leadership, or people management tracks within STPG Product Engineering.

As Frontend Central Product Integration Engineering and transformative (CPIE) team at Micron Technology, Inc., you will be leading new initiatives to deliver pioneering process capability, best-in-class bits per wafer (Yield) with the highest quality and fastest speed through innovation and collaboration with multi-functional teams. Your primary focuses include but not limited to:

Initiate new data solutions and methodologies to:

• identify process, test, and design improvement opportunities, specialized in UE_ROW & all quality index, Front End-PTS integration, and high-value-bits (PG2+) yield;

• modeling, monitoring and aiming for tool performance benchmarking;

• Process equipment prognostics and process integration optimization;

• Identity test optimization opportunities for high product grade yield improvement.

• Collaborate with site Process & Equipment Engineering, Manufacturing(MFG), Product Integration Engineering (PIE) and Data Science (DS) team to establish feasibility of new initiatives, demonstrate business values, and prototype solution mock-ups;

• Partner with Global Quality (GQ), Product Engineering (PE), Central PEE(CPEE), Smart Mfg Artificial Intelligent (SMAI), Technology Development (TD), and Suppliers to deliver end to end solutions, implement BKM development and deployment to production.

• Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness,exercising sound judgment and complying with organizational standards and legal requirements.

• Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabledenhancements within one’s scope of work.

Collaboration

• Partner closely with multi-functional teams to ensure successful communication and collaboration for project implementation.

• Detail oriented with the ability to work independently

• Dependability and able to work effectively in multi-functional teams.

• Facilitate and lead activities in designing and optimizing current system, methods, tool, skill to be Best In industry.

• Manage priorities and enhancements to improve business processes and existing systems that are global in nature.

• Willing to work during non-standard hours when needed to provide support to engineering teams at any Micron site.

• Strong growth mindset and willing to continue to learn, unlearn, relearn.

Communication

• Effective communication skills in verbal/written.

• Self-motivated. Able to work independently with minimal supervision.

• Able to travel as required to support department and company objectives.

Requirement and Technical Competency:

• Experience in PIE, Test solution team, product engineering and circuit design engineering. Understanding of Process/Product Integration will be advantageous;

• In depth knowledge of processes, equipment and control system;

• Proficiency in data analytical tools such as Y3, JMP, Python to perform numerical experiment. Proficiency in Statistical/Machine Learning will be additional advantageous; 

• Proven track record to make decisions, multi-task, and solve problems and address root causes.

• Exhibit critical thinking to find opportunities.

• PhD/Masters/Bachelors with relevant course of study and experience

• Ability to apply baseline digital fluency and role‑appropriate AI literacy to use AI‑enabled tools responsibly and effectively for research, analysis, content creation, problem‑solving, operational tasks, and achieving business outcomes.

As a key leader within High Bandwidth Memory (HBM) Product Engineering Media Health team, you will spearhead and develop a high performing team driving both intrinsic and extrinsic reliability test development and execution for Micron’s latest HBM products, both on DRAM and Interface die and a stacked product. Your responsibility is to drive extrinsic DPM reduction (Time 0 and Field DPM) and lead the intrinsic reliability charter, along with optimized Manufacturing Test Flow to meet critical KPI’s Quality, Cost and Cycle Time. You will be leading the team to characterize the products from reliability aspect, identify the reliability gaps, working on root cause and resolution of qual and RMA failures pertaining to defectivity and intrinsic reliability margin and drive fab process improvement driven by the qual failures. Additionally, your team will also be the key person in frontend process conversion, where you will work with Fab, TD, GQ teams to establish robust business process for process conversions to facilitate yield improvements, DPM and Cost Reduction. You will collaborate across functions within and outside of HBM to meet both strategic and tactical objectives while continually maximizing the effectiveness of the HIG HBM PE organization. The future of HBM are exciting and dynamics. Micron is seeking experienced individuals that find technical challenges engaging and invigorating.

Responsibilities:

• Reliability Test Flow Development: Define and develop reliability stress, test flows and test plans to cover all Product Reliability aspects.

• Reliability Test Plan and Execution: Work closely with Global Quality team to define qualification plan, review and manage the qualification execution progress, and drive for qualification gating issue resolution.

• DPM reduction: Drive down and achieving Extrinsic Reliability (Time 0 and Field DPM) and Intrinsic Reliability through Optimized Manufacturing Test Flows and Test Strategy to meet critical KPI’s Quality, Cost and Cycle Time

• Root Cause and Resolution of Qual and RMA Device Issues pertaining to defectivity and intrinsic reliability: Debug and identify root cause and failures in reliability tests by electric failure analysis(EFA) and Physical Failure Analysis (PFA) and drive for resolution and improvements through cross functional team collaboration.

• Process Conversions and HVM: The role involves providing recommendation to fab teams for new process conversions to reduce cost, increase yields. This is critical as it directly impacts the yield, quality, reliability, and performance of HBM products, which are key components in many modern technologies.

• Risk Management: The role requires communication with Product Managers/Leads to manage risks associated with DPM process conversions. This is crucial in ensuring that the conversions move at an appropriate pace, balancing the need for innovation with the need for stability and reliability.

• Promotion of Innovation: The role involves promoting innovation and driving for changes that will provide Micron with a technical advantage over its competition. This is vital for maintaining Micron’s competitive edge in the market.

• Mentorship and Development of Others: The role involves actively developing and mentoring others. This is important for the growth and development of the team and the organization.

• Project Management: Developing project management skills within the team ensures efficient execution of projects, leading to timely delivery of technological solutions.

• Technical Decision Making: The role involves making final decisions on risk analysis and project prioritization. These decisions directly impact the direction of technological development.

• Cross-Functional Collaboration: This role necessitates collaboration with various cross-functional teams such as Fab, HBM Technology Development, HBM Design, System Development, and Quality/Reliability team. This collaboration is vital for the holistic development and shipping of end products.

Requirements

• Bachelors/Masters Electrical and Electronics Engineering Degree with 3 years of experience in the semiconductor industry. Product Engineering experience is preferred.

• Demonstrating Strong Leadership Skills and Technical Skills, especially in problem solving with root cause understanding and solution space through in depth circuit analysis.

• Good knowledge of statistics and data analysis tools and scripting.

• Dedicated and highly motivated with a flexible approach towards adapting to different roles in a dynamic working environment (from leading the team to leading technical programs).

• Proven track record of collaborative work within/across teams to address sophisticated business and engineering problems.

• Strong sense of responsibility and accountability towards assigned role with professional work ethic.

• Excellent communication and presentation skills.

• Passionate about people leadership, with a drive toward ongoing learning and development in this area.

• Work on site in Singapore with international travel to US, Taiwan and Japan.

Job Summary:
Coherent is currently hiring a Senior Manufacturing Engineer to work at our manufacturing site located in Singapore. We are looking for a hands-on candidate for our industry-leading laser technology products. The Manufacturing Engineer will be responsible for developing, optimizing, and maintaining the manufacturing processes used in the production of laser systems and optical assemblies. This role ensures high-yield, cost-effective, and reliable production through continuous process improvement, equipment qualification, and close collaboration with design, quality, and supply chain teams. The engineer will be a key technical link between R&D and production, focusing on scalability, manufacturability, and operational excellence.

Primary Duties & Responsibilities

1. Process Development and Optimization

• Develop, document, and implement manufacturing processes for laser modules, optical assemblies, and related sub-systems.
• Define critical process parameters for optical alignment, bonding, soldering, and laser cavity assembly.
• Conduct DOE (Design of Experiments) and SPC (Statistical Process Control) to optimize yield and minimize process variability.
• Translate R&D prototypes into robust, repeatable production processes.

2. Production Support

• Provide hands-on technical support to production teams for troubleshooting yield issues, process deviations, and equipment downtime.
• Implement root cause analysis and corrective actions for production failures (using tools like DMAIC, FMEA, Ishikawa).
• Support daily manufacturing operations to meet production schedules and performance targets (throughput, yield, quality).

3. Equipment and Tooling Management

• Specify, qualify, and maintain production equipment such as optical benches, alignment stations, bonding systems, and test setups.
• Design and procure custom fixtures, jigs, and alignment tools to improve precision and throughput.
• Ensure calibration and preventive maintenance of manufacturing and metrology tools.

4. Quality and Continuous Improvement

• Work with Quality and Reliability teams to ensure process compliance to ISO 9001 / ISO 13485 standards.
• Develop and update process documentation: work instructions
• Drive Lean and Six Sigma initiatives for process improvement, waste reduction, and cost optimization.

5. Cross-Functional Collaboration

• Interface with Design Engineering for Design for Manufacturability (DFM) reviews and prototype builds.
• Collaborate with Supply Chain and Vendors to ensure component quality and manufacturability.
• Support NPI (New Product Introduction) transitions from R&D to production.

6. Data Analysis and Reporting

• Collect and analyze process data to identify trends and improvement opportunities.
• Implement real-time data collection and traceability systems (MES, SPC dashboards).
• Present yield, performance, and process capability metrics to management.

Education & Experience

• A bachelor’s or master’s degree in engineering or its equivalents with at least 3-5 years of relevant work experience in Photonics or a related manufacturing field
• Possess technical expertise pertaining to Manufacturing, Assembly & Test Processes for mechanical assemblies, PCBA and optical components.
• Strong problem-solving skills and excellent knowledge in Six Sigma DMAIC approach, Lean principles, DOE, SPC, FMEA, GR&R and other quality improvement tools. Certified Six Sigma Green or Black Belt will be an advantage.
• Excellent interpersonal skills with good verbal and written communication skills.
• Self-directed and able to work independently with little or no direct supervision.
   

SSMC (Systems on Silicon Manufacturing Company Pte. Ltd.) is a Joint Venture between NXP and TSMC. We offer flexible and cost-effective semiconductor fabrication solutions by maintaining fully equipped SMIF cleanroom environment, 100% equipment automation and proven wafer-manufacturing processes.

We're looking for innovative, passionate, and talented people like you to join our team.

We’re searching for an Engineer/ Senior Engineer to be part of our Product Engineering Department diverse team of talent.

What you will be working on:

• Ensuring 1st time yielding silicon, benchmark D0 for baseline and products.
• Identify & resolve Product, Test & Fab-Process related yield limiters in shortest time possible.
• Technical interface with Business Lines/customers
• Driver for yield improvement
• Resolve product yield, quality and reliability issues
• Perform pre-tapeout risk assessment and communicate with Business line/Fab on the necessary actions to eliminate/minimize the risk.
• Work with Customers/Mother Fab on the DfM related issue.
• Conduct product yield analyses to identify root cause of wafer sort and final test failures
• Set up fault diagnostic capabilities for yield improvement
• Work with Business line/customers on product low yield disposition
• Perform electrical and physical failure analysis to isolate fail location
• Drive the yield improvement task force

More about you:

• Master/bachelor’s degree in electrical / Electronic Engineering or Science in Physics
• 2 – 8 years product and/or test engineering, failure analysis or process-integration experience
• Experience in Fab process, yield engineering or design will be an added advantage
• In depth knowledge of semiconductor device physics, electrical & electronics engineering fundamentals & wafer fabrication processes
• Strong analytical & problem-solving skills
• Good interpersonal and communication skills

SSMC is firmly committed to upholding equal employment opportunities for all individuals. We strictly adhere to the Tripartite Guidelines on Fair Employment Practices (TGFEP), the Singapore Food Safety and Security Act 2025 (FSSA 2025), and the Singapore Code of Advertising Practice. All qualified applicants will receive non-discriminatory consideration for employment on the basis of merit and regardless of age, race, gender, religion, marital status and family responsibilities, or disability, or any other attributes as protected by the relevant laws.

Job Responsibilities:

• Answer phone calls and handle customer enquiry.
• Assist in preparing quotations and order processing.
• Monitor delivery and liaise with customers.
• Follow up on enquiries and on time payment by customers.
• Maintain good rapport and improve good customer relations.
• Ensure all enquiries and orders are processed, checked, documented and filed.
• Any ad hoc duties as assigned.

Requirement:

• Diploma in any discipline or at least 2 years working experience in similar role
• Candidate with Engineering or Technical background will be preferred
• Proficient in Microsoft Office
• Attentive to details, effective follow up skills and customer oriented mindset
• Good interpersonal and communication skills
• 5 working days per week
• Working location : Joo Koon

Interested candidate please email your detailed resume with last drawn and expected salary to cheryllou@kimann.com

Company Overview

TESSOLVE ENGINEERING SERVICES PTE. LTD. is a technology company specializing in engineering services, supporting product development and production for semiconductor and electronics industries.

Job Summary

As a Senior Product Engineer, you will provide comprehensive engineering support across product lifecycles, drive debug and yield improvement activities, and collaborate with cross-functional teams to ensure successful product testing and production release.

Responsibilities

• Provide engineering support for RF, Mixed Signal, Digital, and Power Management products through all development and production phases
• Collaborate with test engineering and production support teams to lead debug activities, reliability qualification, and yield enhancement efforts
• Communicate technical product status and progress to management and relevant stakeholders
• Establish and clarify product testing and production release requirements with customers
• Coordinate with foundries, test subcontractors, and SAT houses to resolve production issues promptly
• Generate detailed status reports, test limits (guard bands), correlation analyses, and yield summary reports at each project phase
• Support initiatives to improve yield, reduce test time, and lower retest rates during production ramp-up

Preferred competencies and qualifications

• Diploma or Degree in Electronics or Electrical Engineering
• 5 to 8 years of relevant experience in Product or Test Engineering, preferably with foundry process background
• Experience leading technical teams is an advantage
• Solid understanding of test concepts for digital, PMIC, Mixed Signal, and RF products
• Hands-on experience with Advantest 93K Automated Test Equipment (ATE)
• Proficient in statistical data analysis and data mining techniques
• Exposure to statistical analysis software such as JMP, CEDA, Data Power, or Optimal Plus is a plus
• Knowledge of scripting languages (Perl, Java, VBA) and automation in reporting is beneficial
• Strong verbal and written communication skills with the ability to work independently

Job Summary

Lead and manage a team of 15-20 workers to execute assigned jobs efficiently. Coordinate with main contractors and clients to ensure production schedules and progress meet project requirements. Prepare job costing, quotations, and claims while negotiating effectively to support project success.

Responsibilities

• Lead and supervise a team of 15-20 workers to complete assigned jobs on schedule and to quality standards
• Coordinate with main contractors and clients to communicate production schedules and monitor job progress
• Calculate completed work quantities accurately to support claim preparation
• Prepare and submit detailed job quotations and costing to support project budgeting
• Submit claims and negotiate with main contractors and clients to resolve issues and secure approvals

Preferred competencies and qualifications

• Minimum 6 years of relevant experience, preferably with piping system expertise

If you are looking to expand your career in Manufacturing, Emerson has a great opportunity for you! Based in Singapore, the Senior / Manufacturing Engineering Assistant will support line sustenance, transfer projects & new product launches.

If this sounds like a good fit, we would love to hear from you!

In this Role, Your Responsibilities Will Be:

· Provides technical support to assigned manufacturing lines.

· Applies engineering, statistical tools and other problem-solving methods to improve first pass yield and resolve Quality, Manufacturing or Equipment related issues.

· Assists engineers in setting up and conducting process & test evaluations; compiles and analyzes data.

· Supports Engineering Changes and Advance Deviation Request implementation.

· Develops and updates Manufacturing and Safety documents.

· Participates in development, training, qualification, and validation activities for new products or technology transfers, and continuous improvement program.

· Responsible for Preventive Maintenance of equipment and fixtures.

· Implement in-house calibration, works with calibration vendors and handles calibration list.

· Works with Design, Engineering, Production, cross-functional team or vendors to support Safety, Quality, Cost reduction and Improvement projects.

· Performs other duties as assigned by supervisor based on business needs.

Who You Are:

You stay aligned with your goals and stay productive. You use systems and technology to stay on track. You prepare content for communication that is impactful.

For This Role, You Will Need:

· Diploma in Engineering with minimum 3 years of relevant experience.

· Strong analytical skills, nimble learner and team player.

· Good communication skills (verbal & written) and presentation skills.

Preferred Qualifications That Set You Apart:

· Knowledge Lean, Statistical Analysis, 6 sigma or Power BI would be an added advantage.

Our Culture & Commitment To You

At Emerson, we prioritize a workplace where every employee is valued, respected, and empowered to grow. We foster an environment that encourages innovation, collaboration, and diverse perspectives—because we know that great ideas come from great teams. Our commitment to ongoing career development and growing an inclusive culture ensures you have the support to thrive. Whether through mentorship, training, or leadership opportunities, we invest in your success so you can make a lasting impact. We believe diverse teams, working together are key to driving growth and delivering business results.

We recognize the importance of employee wellbeing. We prioritize providing competitive benefits plans, a variety of medical insurance plans, Employee Assistance Program, employee resource groups, recognition, and much more. Our culture offers flexible time off plans, including paid parental leave (maternal and paternal), vacation and holiday leave.

WHY EMERSON

Our Commitment to Our People

At Emerson, we are motivated by a spirit of collaboration that helps our diverse, multicultural teams across the world drive innovation that makes the world healthier, safer, smarter, and more sustainable. And we want you to join us in our bold aspiration.

We have built an engaged community of inquisitive, dedicated people who thrive knowing they are welcomed, trusted, celebrated, and empowered to solve the world’s most complex problems — for our customers, our communities, and the planet. You’ll contribute to this vital work while further developing your skills through our award-winning employee development programs. We are a proud corporate citizen in every city where we operate and are committed to our people, our communities, and the world at large. We take this responsibility seriously and strive to make a positive impact through every endeavor.

At Emerson, you’ll see firsthand that our people are at the center of everything we do. So, let’s go. Let’s think differently. Learn, collaborate, and grow. Seek opportunity. Push boundaries. Be empowered to make things better. Speed up to break through. Let’s go, together.

Accessibility Assistance or Accommodation

If you have a disability and are having difficulty accessing or using this website to apply for a position, please contact: idisability.administrator@emerson.com.

ROLEOVERVIEW:

The Product Engineer /Senior Product Engineer adopts perspective with comprehensive technical support in lifecycle management for assigned product lines, from First Article development through to obsolescence. This role drives the expansion of hydraulic repair capabilities, spearheads failure investigations, and delivers expert engineering support to the production team. Key responsibilities include auditing technical publications, mentoring staff, and ensuring all engineering activities align with airworthiness and operational standards.

REPORTS TO:                          

This role shall report to the Engineering Manager (Subject to Organizational Needs).

Key Responsibilities

·       Lead end-to-end development of new aircraft hydraulic components capabilities and through project management in overseeing cost analysis, design, and the engineering of test fixtures and software through to first article inspection, technician training, and the preparation of comprehensive documentation for airworthiness approval.

·       Provide expert technical and engineering support to the workshop, resolving complex troubleshooting and functional testing issues to ensure the seamless repair and overhaul of assigned product lines.

·       Act as the technical liaison with customers, partners, and OEM technical support groups to ensure timely corrective actions on technical maintenance issues.

·       Initiate, review, and implement technical maintenance publications and maintenance of process sheets.

·       Perform failure investigations, warranty adjudication and write component investigation reports.

·      Develop, maintain and update the acceptance testing software and specialized tooling.

·      Ensure all calibrated inspection and test equipment remains fit for purpose and compliant with standards.

·      Perform internal audits and assist in airworthiness, customer and vendor/supplier audits.

·      Lead and participate in Continuous-Improvement, Quality and Safety activities.

·       Carry out any other duties and assignments that may be assigned to him/her from time to time.

Education, Qualifications & Experience

·      Bachelor’s Degree in Aeronautical, Mechanical, Electrical Engineering, or related field.

·      2–3years of relevant experience in the aerospace MRO industry, working in a similar technical capacity.

·      Candidates with an Engineering Diploma, a solid technical foundation with at least five years of relevant aerospace MRO experience will also be considered.

·      Familiarity with hydraulic systems and various methods of hydraulic component testing interfaces.

·      Proficiency in industry standard 2D CAD software such as AutoCAD or DraftSight Pro, along with a working knowledge of    Geometric Dimensioning and Tolerancing (GD&T) per ASME Y14.5.

·       Strong verbal, written, and project management skills.

·       Ability to work collaboratively in a team, take initiative, and perform effectively with minimal supervision.

·       Open only to Singapore Citizens and Singapore Permanent Residents.

Personal Traits:

The Product Engineer / Senior Product Engineer is a self-directed professional who thrives in ambiguous environments, capable of developing viable solutions with minimal supervision. Beyond technical expertise, they exercise a strong sense of accountability, recognizing that their decisions directly impact safety, airworthiness, and financial performance. Success in this role requires a proactive, collaborative approach which includes bridging gaps between internal departments like Operations, Quality, Finance and Supply Chain. The incumbent is a individual contributor/lead who takes immediate ownership of "grey-area" challenges, leveraging exhaustive analysis and resource management to deliver projects that drive organizational growth.