Responsibilities: 

• Develop and optimize unit processes to meet the yield and quality requirements of advanced NAND part type 

• Quantify benefits of innovative process and/or equipment solutions to enable early experimentation and adoption for process margin improvement Prioritize within Singapore based manufacturing Wet Etch team on the key technology issues that need TD breakthroughs. 

• Integrate and troubleshoot processes as part of cross-functional teams driving yield and quality improvement Participate with Boise TD Wet Etch peers on technology choices for the upcoming nodes and able to translate future technology device needs into clear process requirements 

• Process development will include performing fundamental research, hardware evaluations, as well as testing processes for novel applications and generating intellectual property relevant to Micron. 

• Initiate and manage experiments to widen process margins as well as to test out manufacturability of next node solutions 

• Identify process simplification opportunities and drive cross functional teams in implementation Incorporate best known manufacturing methods into early development phase of upcoming nodes. 

• Design and implement advanced process monitoring and control methodologies. 

• Serve as a technical expert within Micron contributing to technical projects for improvements to processes, procedures and equipment. 

• Lead team or sites or suppliers on complex, multi-disciplinary projects in quality focused meetings, process and yield improvement meetings, cost and productivity improvement meetings 

• Provide advice and counsel to management on significant technical issues. Leads and initiate innovation projects through patents/technical papers. 

• This position requires communication and collaboration with partners both locally and globally. 

• Strict adherence to Micron Intellectual Property protection policy is a must. 

• Be part of the continuous worldwide TD engagement with suppliers pushing for breakthrough solutions. 

Requirements: 

• Masters/PhD graduates in Materials Science, Chemical/Microelectronic Engineering or Chemistry are welcome to apply. 

• 2-3 years of semiconductor industry experience is preferable 

• A deep understanding of chemistry, chemical kinetics, thermodynamics and mass transport 

• Basic understanding of films and interface engineering and analysis techniques thereof – SIMS, XPS, EDX, SEM/TEM, FTIR. Understanding of various integration and structural impacts and constraints related to wet etch processes. 

• An understanding of the general process steps and process flow for memory processing, planar and vertical NAND memory in particular. 

• Working knowledge of data analysis systems e.g.: Y3 to facilitate analysis of experimental data 

• Working knowledge of Design of Experiments (DoE) Proven ability to collaborate with local and overseas teams on projects 

• Excellent oral and written communication skills with ability to convey the message in concise and effective manner both in local as well as remote communications. 

• Ability to be a self-motivated individual and be adaptable to Micron’s changing needs in terms of working extended hours, if required Proven ability to work in a demanding & dynamic environment and able to prioritize and manage multiple projects simultaneously 

• Ability to travel for extended periods of time and stay at Boise TD for 2-4 months at a stretch to work on technology development. 

• Demonstrates the ability in applying AI tools to enhance workflows, improve efficiency, and support data-informed decision across team and projects

Micron Technology Inc. is a Fortune 500 company & employs about 45,000 workers worldwide, with HQ in Boise, ID. Micron offers the industry’s broadest portfolio of memory solutions—starting with foundational DRAM, NAND, and NOR Flash memory, extending to SSDs, MCPs, HMCs, and other memory-based systems. Micron is expanding and now starting full-fledged NAND research and development in Singapore co-locating with high volume manufacturing to speed up innovation. Micron has several world class SSD products (NAND) which have revolutionized speed feeding into GPU’s for superior AI performance and achieving blazing fast performance for gaming and pro workloads. Micron is one of the most prolific patent applicants in the world with 60,000 patents granted and still growing.

As a Staff/Principal Engineer, you will be a part of groundbreaking next generation NAND research & development dry etch team driving critical modules listed below. The position promises ample opportunities for innovation, collaboration and testing a new dimension and scaling with next generation NAND. You will work directly with process integration and other process areas such as Wet etch, CVD, Diffusion, Metals, Lithography & Dry Etch. You will be involved with innovative and outstanding dry etch chambers & own the process roadmap to meet program and yield goals. Your responsibilities include, but not limited to:

Main Responsibilities:

• As a CMP Process Development Engineer, you will develop and optimize chemical mechanical planarization procedures. These procedures aim to improve product quality and reliability for the next generation of Micron's memory parts.

• Focus on understanding and improving the process margins required for meeting the mature yield goal for 3D NAND parts

• Advanced 3D NAND CMP process development will include performing fundamental research, consumables development, and hardware evaluation, as well as testing processes for novel applications

• Initiate and manage experiments to widen process margins as well as to evaluate manufacturability of next node solutions

• Extensively collaborate with vendors to develop processes that meet integration requirements for current and next-generation 3-D NAND nodes

• Incorporate best known manufacturing methods into early development phase of upcoming nodes

• Design and implement advanced process monitoring and control methodologies

• Provide strategic roadmap for N+, N++ and future NAND Nodes

• Serve as a technical expert within Micron contributing to technical projects for improvements to processes, procedures, and equipment

• Define and leads complex, multi-functional projects of critical importance to Micron, helps to define strategic direction

• Provide advice and counsel to management on significant technical issues. Leads and initiate innovation projects through patents/technical papers

• This position requires communication and collaboration with partners both locally and globally. Strict adherence to Micron Intellectual Property Protection policy is necessary

Other Responsibilities:

• Mentor new hires and less experienced team members on CMP fundamentals, process development, and Micron systems

• Engage with Procurement & Operations Central Teams and other partners both locally and globally pushing for breakthrough solutions

• As a technical expert, lead or drive team or sites on complex, multi-disciplinary projects in quality focused meetings, process and yield improvement meetings, cost, and productivity improvement meetings

Artificial Intelligence

• Using, applying, and leveraging AI, identify opportunities to streamline workflows, optimize processes, and support innovation by incorporating AI-driven solutions and enabling data-driven decision-making across projects and teams

Education/Job requirements:

• Masters /PhD with 5-10 years or Bachelors degree with 7-12 years of relevant working experience in the semiconductor industry with a background in Chemical Mechanical Planarization (CMP) Process in 300mm wafer fabrication

Must Have Technical Skills

• Hands-on experience CMP equipment operation such as AMAT (LKP), EBARA-300X and next generation CMP equipment, optical metrology, profilometry, polishing slurries, conditioners, and polishing pads

• Experience in dielectrics/metals CMP process development on 3D NAND or other memory technology

• Understanding of various integration and structural impacts and constraints related to film deposition and other upstream/downstream processes

Must Have Soft Skills

• Excellent oral and written communication skills with ability to convey the message in concise and effective manner both in local as well as remote communications.

• Strong collaboration and communication skills (verbal and written).

• Self-driven, adaptable, and able to manage multiple projects.            

• Proven ability to take calculated risks and execute novel solutions.

• Recognized as a mentor, team player and technical expert with the ability to solicit feedback, accept input, and analyze success/failure.

Highly Desirable/Preferred skills or experience

• An understanding of the general process steps and process flow for memory processing planar and vertical NAND memory.

• Strong interest in Data science, modelling, and drive to use/adopt AI to optimize workflows.

Role Summary

As a Senior Member of Technical Staff (SMTS), you are a module‑level CMP technical authority, responsible for defining CMP technical direction, leading FOAK developments, and driving cross‑functional execution across NAND nodes. As a SMTS (Senior Member of Technical Staff), you will be a part of revolutionary Next Generation NAND research & development CMP team driving Advanced NAND and CMP technology forward. The position promises ample opportunities for innovation, collaboration and testing a new dimension and scaling with Next Generation NAND. A SMTS CMP Engineer is a senior individual contributor responsible for defining, developing, and transferring advanced CMP processes for Micron NAND technologies. You will work directly with process integration and other process areas such as Wet Etch, CVD, Diffusion, Metals, Lithography & Dry Etch. You will work on state of the art and best in class CMP chambers & own the process roadmap to meet program and yield goals.

Main Responsibilities

• Own and lead key NAND CMP process modules, translating technology challenges into executable roadmaps across current and future nodes

• Drive cross‑functional execution across Technology Development, Process Integration, Manufacturing, and Equipment teams

• Lead FOAK CMP process development, including recipe architecture, control strategies, and integration alignment

• Ensure process robustness and manufacturability through run‑to‑run controls, SPC, qualification execution, and risk mitigation

• Resolve complex yield, defectivity, and integration issues using model‑based and data‑driven problem solving

• Define and execute process‑level hardware strategies in collaboration with equipment suppliers

• Act as a CMP technical leader, mentoring engineers, influencing adjacent process roadmaps, and communicating technology status and plans to senior stakeholders

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Other Responsibilities

• Mentor engineers through structured development; build SME pipelines; publish internal papers/BKMs and present to senior leadership; uphold Micron’s technical leadership expectations

• Integrates AI assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements.

• Contributes to a culture of continuous improvement by identifying, testing, and sharing AI enabled enhancements within one’s scope of work.

Candidate Profile

Minimum Qualifications / Experience

• PhD ≥12 yrs, or Master’s ≥15 yrs, of relevant experience in
  Electrical Engineering, Materials Science, Chemical Engineering, Physics, or related field,

• Experience in CMP Process Development

• Deep expertise in CMP chemistry, physics, and integration

• Publications/patents and strong record of technical contributions.

Must-Have Technical Skills

• In‑depth expertise in CMP fundamentals, including pad–slurry–wafer interactions, slurry chemistry at a mechanistic level, and pattern density/layout effects

• Strong understanding of multiple CMP process types (e.g., metal, dielectric, barrier/hardmask, poly‑Si/Si CMP)

• Extensive hands‑on experience with advanced 300 mm CMP OEM platforms, including driving hardware capability, throughput, and cost improvements

• Proven expertise in statistical process control (SPC), data analysis, and qualification methodologies

• Ability to independently drive complex technical execution, resolve yield and defectivity issues, and influence cross‑functional teams

Must-Have Soft Skills

• Demonstrated technical leadership in problem solving, with experience leading complex or multi‑disciplinary technical projects

• Strong ability to influence without authority across process integration, equipment, and manufacturing teams

• Clear and structured technical communication skills, including written documentation and stakeholder updates

• Strong analytical mindset with disciplined, data‑driven decision making

Embody Micron’s core values:

• People – Respect, develop and empower others

• Innovation – Drive continuous improvement and breakthrough thinking

• Tenacity – Show grit and determination

• Collaboration – Build trust and foster teamwork

• Customer Focus – Deliver excellence and value

Description Summary

Balyasny Asset Management (BAM) isa diversified global investment firm founded in 2001 by Dmitry Balyasny, Scott Schroeder, and Taylor O'Malley. With over $32 billion in assets undermanagement, BAM employs more than 2,000 people across 23 offices in the U.S. and Canada, Europe, the Middle East, and Asia. The firm’s investment teams span five strategies, including Equities Long/Short, Fixed Income & Macro, Commodities, Multi-Asset Arbitrage, and Systematic. Balyasny’s mission is to deliver to its investors absolute, uncorrelated returns in all market environments.

ROLE OVERVIEW

Are you a software engineer with a passion for technology and a knack for solving complex problems? Join our dynamic team in Singapore as an Engineer, where you'll play a pivotal role in designing, building, testing, deploying, and maintaining our critical trade management system. Our primary development is in Rust, and you'll also work with and support C#/.NET components where appropriate.

We are leveraging Rust to maximize throughput and reliability, minimize memory usage, and ultimately reduce compute and memory costs across our AWS environment (including serverless workloads). You'll work on distributed systems and high-volume processing, collaborating with talented engineers across the globe.

WHAT YOU'LL DO

• Innovate and Enhance: Design and build Rust-based, multithreaded, high-volume trade flow processing systems.

• Interoperate: Integrate with existing C#/.NET services and contribute to those codebases as needed.

• Performance & Cost: Profile and optimize latency, memory usage, and resource footprints to reduce AWS costs.

• Decision Making: Make independent decisions while effectively mitigating risks.

• Ownership Mentality: Take full ownership of all aspects of our trade management systems.

• Fast-Paced Environment: Thrive in a fast-paced setting, balancing second-line support with strategic development responsibilities.

• Global Collaboration: Work closely with engineers in the UK, Poland, New York, and Hong Kong to deliver robust solutions.

WHAT WE'RE LOOKING FOR

• Experience: 5+ years of hands-on experience in a formal enterprise-level development environment.

• Technical Skills:

o Strong expertise in Rust/ JAVA/ C# (async/await, concurrency, memory/ownership model, multi-threaded programming) and solid software design skills.

o Able to use C# and .NET Core to read, support, and contribute to .NET services where needed.

o Proven experience in building connected, service-oriented applications (e.g., REST/gRPC, microservices).

o 5+ years’ experience with enterprise messaging systems (e.g., Kafka, RabbitMQ, SQS/SNS).

o Experience with AWS, including serverless technologies (e.g., Lambda) and an understanding of how performance and memory optimizations translate to cost savings.

• Communication: Excellent verbal and written communication skills, with the ability to explain complex ideas clearly to various audiences.

• DevOps Knowledge: Experience with JIRA, Git, Jenkins, and Octopus Deploy.

PREFERRED EXPERIENCE AND SKILLS

• Agile Development: Familiarity with Agile software development methodologies and best practices.
• Test-Driven Development: Experience with behavior-driven and test-driven development approaches; exposure to Rust testing frameworks such as proptest or quickcheck would be advantageous.
• Full-Stack Development: Working knowledge of modern web and mobile development frameworks, including React.js and Angular.
• Financial Markets Knowledge: Understanding of the FIX protocol and Microsoft SQL Server, along with familiarity with U.S. and international equities, fixed income, and commodity markets.
• Post-Trade Lifecycle: Awareness of post-trade lifecycle processes and related operational workflows.

WHY JOIN US

• Meaningful Impact: Play a key role in building and enhancing critical systems that support our trading operations.
• Career Development: Broaden your exposure to the business and operational aspects of trading and post-trade processing.
• Collaborative Culture: Join a high-performing, supportive team that values innovation, partnership, and continuous improvement.
• Global Connectivity: Work closely with engineering colleagues across the UK, Poland, New York, and Hong Kong.

Role Overview

• Responsible for building, operating, and optimizing technical systems

• Work closely with development teams to ensure product stability, security, and performance

Key Responsibilities

• Deploy, manage, and optimize applications built with Node.js, React.js, and Next.js

• Manage AWS cloud infrastructure and operate containerized applications using Docker

• Design, administer, and optimize databases including MySQL, PostgreSQL, and Redis

• Integrate and manage GitHub Copilot to enhance developer productivity

• Explore and implement Generative AI (GenAI) solutions across systems and applications

• Monitor system performance, troubleshoot issues, and ensure high system availability

• Collaborate with development, QA, and operations teams to streamline workflows

• Propose and apply DevOps and Technical Operations best practices

• Participate in shift rotation and standby duties to support business operations, including:

  • Monitoring systems and responding to incidents outside regular business hours

  • Providing timely responses to urgent alerts or service requests

  • Ensuring smooth handover between shifts and maintaining incident documentation

Requirements

Education & Experience

• Bachelor’s degree in Computer Science, Information Technology, or a related field

• Minimum 4 years of experience in Technical Operations, DevOps, or Backend Engineering

Technical Skills

• Proficiency in Node.js, React.js, and Next.js

• Hands-on experience with AWS services such as EC2, S3, Lambda, and RDS

• Strong knowledge of Docker and containerized environments

• Experience working with MySQL, PostgreSQL, and Redis

• Familiarity with GitHub Copilot in development workflows

• Exposure to Generative AI (GenAI) tools or projects is an advantage

Other Requirements

• Willingness to support shift rotations and after-hours operational support when required

• Strong problem-solving mindset

• Good communication and teamwork skills

Required Tech Stack Summary

Frontend

• Next.js 14

• React 18

• TypeScript

• Styled Components

• Life.sg React Design System v3

• React Hook Form

• React Leaflet

Backend

• Node.js + TypeScript

• Koa / Express

• MySQL (TypeORM)

• PostgreSQL

• Redis (ioredis)

• OpenSearch

• ActiveMQ

• AWS Services (Lambda, S3, SQS, RDS, ElastiCache)

Deployment

• Docker

• Docker Compose

• Terraform

• AWS

Testing

• Jest

• React Testing Library

• Supertest

• Playwright

• ESLint / Prettier

Accessibility

• Oobee (Accessibility Scanning)

• WCAG 2.1 Compliance

• Life.sg Design System v3

Authentication

• Singpass

• MyInfo Integration

• JWT (APEX Standards)

Build & Tools

• Node.js 22

• npm / lockfiles

• TypeScript

• Webpack

• Rollup

Full-Time & Part-Time Positions Available

Location: Hillview, Singapore

We are looking for hardworking, trustworthy, and positive individuals to join our team immediately. No prior F&B experience is required as training will be provided.

WHY JOIN US?

✅ Competitive Salary + Performance Commissions

✅ Free Staff Meals

✅ Fixed Shift Options (Day or Night Shift)

✅ Simple & Streamlined Operations

✅ Career Progression Opportunities

✅ Internal Promotions Preferred

✅ Friendly & Supportive Team Environment

SALARY

Full-Time:
$2,000 – $2,500 per month

• Performance Commissions

Part-Time:
$10 – $15 per hour

• Performance Commissions

WORKING HOURS

6 Days Per Week

Choose Your Preferred Shift:

Day Shift:
10:00am – 6:30pm

Night Shift:
6:00pm – 2:00am

WHO WE ARE LOOKING FOR

• Singapore Citizens or Permanent Residents only

• Foreigners need not apply

• No experience required

• No minimum educational qualifications required

• Good communication skills

• Friendly and customer-oriented

• Trustworthy and responsible

• Positive attitude and willing to learn

• Team player who works well with others

• Able to work in a fast-paced environment

• Looking for a long-term career opportunity

JOB RESPONSIBILITIES

As an Operations Executive, you will be responsible for the day-to-day operations of the outlet, including:

• Preparing and serving food according to company procedures

• Operating POS and handling customer payments

• Providing excellent customer service

• Assisting customers with orders and enquiries

• Receiving and checking daily stock deliveries

• Preparing ingredients and products for service

• Maintaining cleanliness and hygiene standards

• Packing takeaway and delivery orders

• Supporting teammates to ensure smooth operations

• Opening and closing of the outlet when required

Our operations are designed to be simple and efficient, with many preparation processes handled centrally, making the role easy to learn and execute.

HOW TO APPLY

Please include:

• Full Name

• Age

• Residential Area

• Availability

• Full-Time or Part-Time Application

Immediate vacancies available.

Only shortlisted candidates will be contacted.

Industry: Logistics

Conducive Working Environment

MNC Environment

Responsibilities:

• Provide strategic site-level leadership, overseeing daily warehouse workflows, facility layout optimization, and the integration of automation technologies.
• Drive aggressive cost and spend management, rigorously reviewing overtime costs, third-party expenses, and sourcing more cost-effective operational alternatives.
• Serve as the key commercial and operational contact for the customer, supporting the Senior Manager/Sales in contract renewals and scope expansions.
• Lead the deployment of Lean Six Sigma projects and digital transformation initiatives to continuously improve productivity and service standards.
• Accountable for the program P&L, budgetary control, and optimal resource allocation.
• Approve third-party costs, equipment requisitions, and operational POs up to assigned financial thresholds (e.g., SGD 50k).
• Ensure strict site-wide compliance with local regulatory requirements, including WSH Act, MOM guidelines, and SCDF regulations.
• Conduct comprehensive performance reviews, manage capacity forecasting, and allocate manpower based on long-term volume trends.

Requirements:

• Degree in Business, Supply Chain, Logistics, or a related discipline.
• 5 to 8 years of relevant experience in a managerial position within Contract Logistics.
• Proven track record in P&L management, Lean implementations, and leading large, multi-functional teams.
• Strong commercial acumen and ability to understand lease terms, pricing models, and SLA penalties.
• Excellent executive presentation skills for leading customer Quarterly Business Reviews (QBRs) and internal steering meetings.

Job ID: JOB-00447

All successful candidates can expect a very competitive remuneration package and a comprehensive range of benefits.

Kindly email your resume in a detailed Word format to carlo@peopleprofilers.com

We regret that only shortlisted candidates will be notified

People Profilers Pte Ltd

20 Cecil Street, #08-09 PLUS Building Singapore 049705

+65 69509747   

EA License Number: 02C4944

Registration Number: R1100011

EA Personnel: Carlo Antonio Dela Cruz

Develop wealth management strategies for clients:

- Create tailored wealth management plans aligned with client goals

- Consider all aspects of client wealth, including investments, taxes, and estate planning

- Collaborate with clients to set and achieve wealth objectives

Provide investment advice and planning for wealth growth/protection:

- Offer investment advice and strategies for wealth growth and protection

- Provide guidance on asset allocation, risk management, and wealth preservation

- Help clients navigate complex investment decisions

Analyze client portfolios and optimize wealth plans:

- Review and analyze client portfolios and wealth plans

- Identify areas for optimization and improvement

- Implement changes to enhance portfolio performance and alignment with goals

Focus on long-term wealth goals and legacy planning:

- Help clients set and achieve long-term wealth goals (e.g., retirement, legacy)

- Consider estate planning, tax efficiency, and intergenerational wealth transfer

- Provide guidance on philanthropy and charitable giving strategies

*Seeking for talents in Trade Finance operations experience (Import/Export documentations) in Banking industry*

THE COMPANY

A classic brand with a prominent name in the Banking arena, this bank has a strong emphasis on the people and team's culture. As the bank continues to prepare for growth, they seek for Trade Finance Operations to be part of their Trade Finance team!

JOB RESPONSIBILITIES

• Handle Import (e.g. Letters of Credit, Bills, Guarantees, Trust receipts)
• Handle Export documents (e.g. Letters of Credit, Discounting, Bills collections)
• Perform AML checks
• Prepare client reports
• Work closely with clients and various stakeholders

JOB REQUIREMENTS

• Degree in Business Studies/Finance/Banking/Economics/Commerce or any other relevant education
• Minimum 3 years of Trade Finance operations experience (Import/Export documentations) in Banking industry
• Team player, keen eye for details and has good interpersonal skills

If you will like to explore this opportunity, please email your resume in Microsoft Word format to marie@resolutehunter.com

We thank you for your interest and will contact shortlisted candidates for more detailed discussion.

For more job openings, please visit our website at https://resolutehunter.com/opportunities/

EA Licence 18C9105

EA Reg R1105305

Industry: Logistics

Conducive Working Environment

Location: East

Responsibilities:

• Lead and oversee a large-scale, multi-site contract logistics portfolio, providing strategic direction and operational leadership across multiple facilities.
• Mentor, guide, and develop a high-performing leadership team, including General Managers and senior operations leaders.
• Collaborate closely with Commercial, Business Development, and Solution Design teams to support business growth, large-scale tenders, and successful onboarding of new strategic accounts.
• Drive organizational planning and workforce strategies to ensure operational scalability, leadership succession, and long-term business sustainability.
• Champion strategic transformation initiatives, including digitalization, automation, and ESG sustainability programs across the logistics network.
• Own and manage the overall P&L performance, financial planning, forecasting, and profitability improvement initiatives for the assigned portfolio.
• Act as the key escalation point and executive stakeholder lead for regional and global clients, ensuring strong customer partnerships and service excellence.
• Lead infrastructure planning, warehouse optimization, automation initiatives, and CAPEX investment strategies to support business expansion.
• Foster strong cross-functional collaboration between Operations, Engineering, IT, HR, and other business functions to enhance operational efficiency and employee engagement.

Requirements:             

• Bachelor’s Degree in Supply Chain, Logistics, Business, or a related discipline is required. MBA or Master’s Degree will be an added advantage.
• At least 12–15 years of leadership experience within a leading 3PL, contract logistics, or supply chain environment.
• Strong track record in managing large multi-site operations, leading senior operational teams, and driving business growth and operational excellence.
• Experience in P&L management, customer stakeholder engagement, and large-scale transformation initiatives.
• Strong strategic thinking, leadership, and stakeholder management capabilities.
• Exposure to automation, digitalization, and continuous improvement initiatives within logistics operations will be highly advantageous.

All successful candidates can expect a very competitive remuneration package and a comprehensive range of benefits.

Kindly email your resume in a detailed Word format to carlo@peopleprofilers.com

We regret that only shortlisted candidates will be notified

People Profilers Pte Ltd

20 Cecil Street, #08-09 PLUS Building Singapore 049705

+65 69509747   

EA License Number: 02C4944

Registration Number: R1100011

EA Personnel: Carlo Antonio Dela Cruz

• Investigate, troubleshoot and resolve IT-related issues involving operating systems, software, hardware, networks, printers and scanners.
• Assist in the setup, configuration, maintenance, and troubleshooting of office IT infrastructure including LAN, internet connectivity, routers, switches, wireless access points and NAS system.
• Install, configure, and maintain end-user equipment such as desktops, laptops, monitors and peripherals.
• Assist HR with IT onboarding and offboarding, including granting system access, conducting induction for new hires, and preparing devices.
• Ensure IT security and data privacy practices are followed, including antivirus updates, access controls, and basic security checks.
• Liaise with external IT vendors and service providers for issue escalation, maintenance, and IT-related projects.
• Maintain accurate IT asset tracking, including hardware inventory, software licenses, and equipment lifecycle records.
• Document IT procedures, system configurations, troubleshooting steps, and infrastructure changes.
• Assist the team with ad-hoc IT tasks, projects, and improvements as required.

The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM).

This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements.

The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle.

Key Responsibilities

Probe Coverage Strategy & Ownership

• Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands.

• Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives are met without unnecessary test overhead.

• Establish probe limits and guard‑bands based on silicon characterization, design intent, and customer specifications, with clear alignment to downstream test.

• Lead probe enablement for new product introductions (NPI) and technology ramps, identifying coverage and manufacturability risks early and driving mitigation plans.

Pre‑Silicon Design‑to‑Probe Staging & DFT Readiness

• Partner with Design, DFT, and DV teams during pre‑silicon phases to drive effective design‑to‑probe staging.

• Review and influence DFT architecture, test hooks, observability, redundancy, and trim structures to enable efficient and manufacturable probe coverage.

• Participate in pre‑silicon verification and simulation reviews to reduce first‑silicon debug risk.

• Define probe coverage intent early and ensure continuity from design features through probe and downstream test (shift‑left learning).

First Silicon Bring‑Up & Device Characterization

• Support first‑silicon bring‑up using engineering probe platforms and lab‑based characterization setups.

• Perform silicon and device‑level characterization (parametric behavior, margins, trims, stress response) to inform probe limits and screening strategy.

• Correlate early silicon behavior with probe results to validate coverage intent, identify gaps, and eliminate redundant content.

• Provide early silicon learning to accelerate probe flow stabilization and yield ramp.

Yield, Quality & Reliability Enablement

• Drive wafer‑level yield learning, bin definitions, and failure‑mode analysis at probe.

• Enable intrinsic and extrinsic screening strategies in collaboration with Reliability teams.

• Provide structured, data‑backed feedback to Fab, Process Integration, Design, and DV teams to close learning loops efficiently.

Test Efficiency & Cost Optimization

• Drive test efficiency improvements through coverage right‑sizing and flow optimization, aligned to product and market needs.

• Support wafer‑level speed (WLS) activities as part of broader probe optimization efforts.

• Balance coverage, yield, quality, and cost trade‑offs using silicon data and product risk understanding.

Data, Analytics & AI Enablement

• Leverage probe, inline, and reliability data for yield analysis, anomaly detection, and decision support.

• Contribute to AI/ML initiatives such as predictive probe, smart sampling, and test optimization.

• Apply data‑driven insights to continuously improve probe effectiveness and efficiency.

Artificial Intelligence

• Using, applying, and leveraging AI, identify opportunities to streamline workflows, optimize processes, and support innovation by incorporating AI-driven solutions and enabling data-driven decision-making across projects and teams

Experience Level & Entry Consideration

This role is open to both early‑career and experienced engineers, with leveling (GJS) aligned to technical depth, scope of ownership, and demonstrated impact.

• Fresh Bachelor’s/Master’s / PhD Graduates

• Strong fundamentals in semiconductor devices, circuits, physics, or process technology.

• Academic, research, or internship exposure to silicon behavior, characterization, variability, reliability, or design analysis.

• Will grow into full probe ownership with mentorship, focusing on device, design, and process understanding.

• Experienced Engineers (Eligible for Higher GJS)

• Prior experience in product engineering, device engineering, process integration, silicon characterization, or design‑facing roles.

• Demonstrated ownership of first‑silicon learning, qualification strategy, yield mechanisms, or cross‑functional technical trade‑offs.

• Comfortable influencing upstream and downstream teams through technical insight and silicon‑based decision‑making.

Required Qualifications

• Bachelor’s, Master’s degree, or Phd in Electrical / Electronics Engineering, Computer Engineering (with strong hardware, circuits, or semiconductor focus), Semiconductor Physics, or related field.

• Strong fundamentals in semiconductor devices, wafer test, and product engineering.

• Demonstrated ability to use silicon behavior and characterization data to make informed probe, yield, and coverage decisions.

• Experience or strong interest in silicon learning, device behavior, yield mechanisms, DFT intent, or design‑to‑manufacturing integration.

• Strong analytical skills and ability to drive structured root‑cause analysis.

• Effective communication skills and ability to work across global, cross‑functional teams.

Preferred Qualifications

• Experience with NAND / memory products.

• Experience working directly with Design, Process Integration, or Device teams to resolve silicon or product issues.

• Exposure to probe flow optimization, yield learning, or test cost reduction.

• Familiarity with DFT verification, reliability screening, or test correlation methodologies.

• Experience with Python, SQL, JMP, or data / ML tools.

• Demonstrated ability to independently drive complex technical problems from concept through execution.

Career Growth & Impact

• Direct ownership of probe strategy and quality outcomes across the product lifecycle.

• Exposure to advanced technology nodes, customer‑driven requirements, and large‑scale manufacturing systems.

• Clear growth paths across senior technical contributor, product leadership, or people management tracks within STPG Product Engineering.
  

  Performs hardware, software, semiconductor design or telecomm engineering assignments. This job mapping should be used only if the position cannot be mapped specifically to other design/development engineering jobs.

As a Process Engineer you will be primarily responsible for starting up, developing and optimizing processes to improve product quality and reliability, working on process yield improvement, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. You will also be required to identify, diagnose and resolve assembly process related problems by applying failure analysis, FMEA, 8D or SPC/FDC methodology. Additional responsibilities include coordinating and carrying out process, equipment and material evaluation/optimization to implement changes at process step, leading and participating in yield improvement and cost reduction activities, handling new process baseline qualifications and managing, auditing and liaising with material suppliers to achieve quality, cost and risk management objectives.

Job Description

Micron’s NAND Process Development (PD) Singapore group is looking for process development engineer to support TD activities associated with rapid deployment of technology nodes, the process margin improvement work necessitated thereof as well as to ensure extended engagement with manufacturing on the upcoming technology nodes.

Responsibilities

• Process module ownership involving Chemical Mechanical Planarization (CMP) process characterization and advanced process development for 3D NAND and beyond.

• Work with process development engineers in Singapore and Boise, US TD site and vendors to develop processes that meet integration requirements for next-generation 3-D NAND nodes.

• Transfer CMP processes to high volume manufacturing (Fab10N), and work on continuous improvements to manufacturability.

• Address process issues working with Fab10N team and with key business partners on tool choices for manufacturing, evaluations etc., as applicable.

• Focus on understanding and improving the process margins required for meeting the mature yield goal for 3D NAND parts.

• Advanced 3D NAND CMP process development will include performing fundamental research, consumables development, and hardware evaluation, as well as testing processes for novel applications.

• Initiate and manage experiments to widen process margins as well as to test out manufacturability of next node solutions

• Identify process simplification opportunities and drive multi-functional teams in implementation

• Incorporate best known manufacturing methods into early development phase of upcoming nodes.

• Design and implement advanced process monitoring and control methodologies.

• Serve as a technical expert within Micron contributing to technical projects for improvements to processes, procedures and equipment.

• Define and leads complex, multi-functional projects of critical importance to Micron, helps to define strategic direction.

• Lead team or sites or suppliers on complex, multi-disciplinary projects in quality focused meetings, process and yield improvement meetings, cost and productivity improvement meetings

• Provide advice and counsel to management on significant technical issues. Leads and initiate innovation projects through patents/technical papers.

• This position requires communications and collaboration with partners both locally and globally.  Strict alignment to Micron Intellectual Property protection policy is a must.

• Be part of the continuous worldwide TD engagement with suppliers pushing for breakthrough solutions.

• Using, applying, and leveraging AI, identify opportunities to streamline workflows, optimize processes, and support innovation by incorporating AI-driven solutions and enabling data-driven decision-making across projects and teams

Requirements

• Bachelors’/Masters in Materials Science, Chemical Engineering or Physics with minimum 5 years hands-on experience in groundbreaking CMP polishing equipment such as AMAT or EBARA, or

• PhD in Materials Science, Chemical Engineering or Physics.

• Lead and mentor CMP engineers early in their careers while driving technical excellence.

• Build, lead, grow a capable CMP team for NAND technology development

• Excellent problem-solving skills and critical decision making

• Working knowledge of data analysis systems e.g.: Y3 to facilitate analysis of experimental data

• Working knowledge of Design of Experiments (DoE)

• Proven ability to collaborate with local and overseas teams on projects

• Excellent oral and written communication skills with ability to convey the message in concise and effective manner both in local as well as remote communications.

• Proven ability to work in a demanding & dynamic environment and able to prioritize and manage multiple projects simultaneously

The Senior Engineer supports photolithography process development for advanced memory technologies through hands‑on experimentation, data analysis, and yield improvement activities. This role focuses on execution excellence, disciplined learning, and collaboration, operating under guidance from senior technical leaders. Success in this role requires strong fundamentals in photolithography, analytical rigor, and the ability to translate experimental data into actionable insights. 

Main Responsibilities 

• Execute photolithography process development, optimization, and troubleshooting tasks in support of yield, quality, and performance targets. 

• Perform DOE, SPC, and statistical analysis to characterize process behavior and identify improvement opportunities. 

• Support material evaluations, defect learning, overlay analysis, and process window characterization. 

• Assist with integration learning during development and early manufacturing ramps. 

• Collaborate with cross‑functional teams including integration, etch, metrology, and yield engineering. 

Other Responsibilities 

• Document experimental procedures, results, and learnings in technical reports and presentations. 

• Support technology transfer activities under direction of senior engineers. 

• Integrates AI‑assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. 

• Contributes to a culture of continuous improvement by identifying, testing, and sharing AI‑enabled enhancements within one’s scope of work. 

Candidate Profile 

Minimum Qualifications / Experience 

• PhD, or Master’s ≥3 yrs, or Bachelor’s ≥5 yrs of relevant experience in 
  Electrical Engineering, Materials Science, Chemical Engineering, Physics, or related field, with foundational experience in semiconductor photolithography process development. 

Must‑Have Technical Skills 

• Demonstrated ability to contribute effectively to photolithography process development initiatives and improvement plans. 

• Deep knowledge in optics, immersion lithography, polarized illumination, and low k1 imaging  

• Proficiency in lithography simulation tools, material characterization, DOE, SPC, and basic statistical data analysis 

Must‑Have Soft Skills 

• Analytical thinking and structured problem‑solving 

• Collaboration and openness to learning 

• Clear technical communication 

• Project Management; especially in technical & technology programs  

• Demonstrates ability in applying AI tools to improve workflows, drive efficiency, and support data-informed decisions across teams and projects.

Highly Desirable / Preferred 

• Exposure to advanced lithography (193nm, 248nm, 365nm) and EUV processes 

• Hands-on experience with innovative photolithography equipment and metrology tools 

Embody Micron’s core values: 

• People – Respect, develop and empower others  

• Innovation – Drive continuous improvement and breakthrough thinking  

• Tenacity – Show grit and determination  

• Collaboration – Build trust and foster teamwork  

• Customer Focus – Deliver excellence and value 

Role Summary

The DMTS is a recognized expert inside and outside Micron, shaping the technical vision for cell film processes with influence across top-level organizational boundaries, leading programs spanning the engineering group, driving breakthroughs, influencing industry/cross-disciplinary teams, and mentoring senior technical leaders to guide critical roadmap decisions. Owns and updates the cell film process technology roadmap; drives external collaborations and benchmarking; prepares high-impact technical deliverables (presentations/white papers/patent filings); guides investment and prioritization decisions.

Main Responsibilities

• Serve as the CMP technical authority for NAND technology development, defining long‑term technology and equipment strategies

• Architect and drive next‑generation CMP process innovation, including FOAK developments, recipe architecture, and integration alignment

• Lead resolution of the most complex yield, defectivity, and integration challenges through deep CMP process, materials, and layout expertise

• Define and execute CMP hardware and supplier roadmaps, translating industry benchmarking and external insights into internal advantage

• Provide forward‑looking technical leadership, identifying scaling risks early and driving proactive mitigation strategies

• Drive cross‑functional execution across Technology Development, Process Integration, Manufacturing, and Equipment teams

• Mentor senior engineers and strengthen CMP technical capability across the organization

• Represent Micron CMP in cross‑site and external technical forums, and communicate technology roadmaps to senior leadership

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Other Responsibilities

• Prepare high-impact technical presentations, white papers, and patent filings; initiate strategic collaborations with external partners (universities/research institutes).

• Integrates AI assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements.

• Contributes to a culture of continuous improvement by identifying, testing, and sharing AI enabled enhancements within one’s scope of work.

Candidate Profile

Minimum Qualifications / Experience

• PhD ≥15 yrs, or Master’s ≥17 yrs, of relevant experience in
  Electrical Engineering, Materials Science, Chemical Engineering, Physics, or related field,

• Experience in CMP process development within an R&D environment (NAND, DRAM, or Logic), including proven transfer to manufacturing

• Publications/patents and strong record of technical contributions.

Must-Have Technical Skills

• Deep expertise in CMP fundamentals, including pad–slurry–wafer interactions, mechanistic slurry chemistry, and pattern density/layout effects

• Broad understanding of multiple CMP process types, including metal, dielectric, barrier/hardmask, and poly‑Si/Si CMP

• Extensive hands‑on experience with advanced 300 mm CMP OEM platforms, including driving hardware roadmap decisions to improve capability, throughput, and cost efficiency

• Strong command of statistical process control (SPC), data analysis, and process qualification methodologies

• Proven ability to lead supplier technical reviews and head‑to‑head evaluations to advance CMP capability

Must-Have Soft Skills

• Demonstrated technical leadership in complex problem solving, including experience leading high‑impact technical programs or projects

• Ability to independently drive execution and influence cross‑functional teams across process, integration, equipment, and manufacturing organizations

• Strong analytical and structured thinking, with disciplined, data‑driven decision making

• Clear and effective technical communication skills, including executive‑level updates and stakeholder engagement

Embody Micron’s core values:

• People – Respect, develop and empower others

• Innovation – Drive continuous improvement and breakthrough thinking

• Tenacity – Show grit and determination

• Collaboration – Build trust and foster teamwork

• Customer Focus – Deliver excellence and value

The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM).

This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements.

The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle.

Key Responsibilities

Probe Coverage Strategy & Ownership

• Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands.

• Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives are met without unnecessary test overhead.

• Establish probe limits and guard‑bands based on silicon characterization, design intent, and customer specifications, with clear alignment to downstream test.

• Lead probe enablement for new product introductions (NPI) and technology ramps, identifying coverage and manufacturability risks early and driving mitigation plans.

Pre‑Silicon Design‑to‑Probe Staging & DFT Readiness

• Partner with Design, DFT, and DV teams during pre‑silicon phases to drive effective design‑to‑probe staging.

• Review and influence DFT architecture, test hooks, observability, redundancy, and trim structures to enable efficient and manufacturable probe coverage.

• Participate in pre‑silicon verification and simulation reviews to reduce first‑silicon debug risk.

• Define probe coverage intent early and ensure continuity from design features through probe and downstream test (shift‑left learning).

First Silicon Bring‑Up & Device Characterization

• Support first‑silicon bring‑up using engineering probe platforms and lab‑based characterization setups.

• Perform silicon and device‑level characterization (parametric behavior, margins, trims, stress response) to inform probe limits and screening strategy.

• Correlate early silicon behavior with probe results to validate coverage intent, identify gaps, and eliminate redundant content.

• Provide early silicon learning to accelerate probe flow stabilization and yield ramp.

Yield, Quality & Reliability Enablement

• Drive wafer‑level yield learning, bin definitions, and failure‑mode analysis at probe.

• Enable intrinsic and extrinsic screening strategies in collaboration with Reliability teams.

• Provide structured, data‑backed feedback to Fab, Process Integration, Design, and DV teams to close learning loops efficiently.

Test Efficiency & Cost Optimization

• Drive test efficiency improvements through coverage right‑sizing and flow optimization, aligned to product and market needs.

• Support wafer‑level speed (WLS) activities as part of broader probe optimization efforts.

• Balance coverage, yield, quality, and cost trade‑offs using silicon data and product risk understanding.

Data, Analytics & AI Enablement

• Leverage probe, inline, and reliability data for yield analysis, anomaly detection, and decision support.

• Contribute to AI/ML initiatives such as predictive probe, smart sampling, and test optimization.

• Apply data‑driven insights to continuously improve probe effectiveness and efficiency.

Artificial Intelligence

• Using, applying, and leveraging AI, identify opportunities to streamline workflows, optimize processes, and support innovation by incorporating AI-driven solutions and enabling data-driven decision-making across projects and teams

Experience Level & Entry Consideration

This role is open to both early‑career and experienced engineers, with leveling (GJS) aligned to technical depth, scope of ownership, and demonstrated impact.

• Fresh Bachelor’s/Master’s / PhD Graduates

• Strong fundamentals in semiconductor devices, circuits, physics, or process technology.

• Academic, research, or internship exposure to silicon behavior, characterization, variability, reliability, or design analysis.

• Will grow into full probe ownership with mentorship, focusing on device, design, and process understanding.

• Experienced Engineers (Eligible for Higher GJS)

• Prior experience in product engineering, device engineering, process integration, silicon characterization, or design‑facing roles.

• Demonstrated ownership of first‑silicon learning, qualification strategy, yield mechanisms, or cross‑functional technical trade‑offs.

• Comfortable influencing upstream and downstream teams through technical insight and silicon‑based decision‑making.

Required Qualifications

• Bachelor’s, Master’s degree, or Phd in Electrical / Electronics Engineering, Computer Engineering (with strong hardware, circuits, or semiconductor focus), Semiconductor Physics, or related field.

• Strong fundamentals in semiconductor devices, wafer test, and product engineering.

• Demonstrated ability to use silicon behavior and characterization data to make informed probe, yield, and coverage decisions.

• Experience or strong interest in silicon learning, device behavior, yield mechanisms, DFT intent, or design‑to‑manufacturing integration.

• Strong analytical skills and ability to drive structured root‑cause analysis.

• Effective communication skills and ability to work across global, cross‑functional teams.

Preferred Qualifications

• Experience with NAND / memory products.

• Experience working directly with Design, Process Integration, or Device teams to resolve silicon or product issues.

• Exposure to probe flow optimization, yield learning, or test cost reduction.

• Familiarity with DFT verification, reliability screening, or test correlation methodologies.

• Experience with Python, SQL, JMP, or data / ML tools.

• Demonstrated ability to independently drive complex technical problems from concept through execution.

Career Growth & Impact

• Direct ownership of probe strategy and quality outcomes across the product lifecycle.

• Exposure to advanced technology nodes, customer‑driven requirements, and large‑scale manufacturing systems.

• Clear growth paths across senior technical contributor, product leadership, or people management tracks within STPG Product Engineering.

• 3 - 5 Days per week
• Able to work at least 1 weekend (Sat or Sun) per week
• Rotating Shift: 9.30am - 6pm or 1.30pm - 10pm (including 1 hour lunch break)
• Contract Duration: 3 months
• Salary: $12 / hr (weekdays), $13 / hr (weekend) + Commission
• Location: MBS

Requirements:

• Possess Retail Sales / Beauty / Customer Service experience
• Passion for Fragrance, Makeup or Skincare
• Able to commit 3 - 5 days per week, including 1 weekend per week (Sat or Sun)
• Able to commit for 3 months
• Able to commence work immediately or with short notice

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EA License | 14C7092

EA Registration Number | R110507

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