Total 134 Design job vacancies in George Town, Pulau Pinang

Responsibilities:

• Full responsible for Netlist-to-GDS physical design implementation of 12nm/6nm/4nm and below advanced process chips.
• Block owner, take block of 2~3 Million instances, working on Synthesis/APR(auto place and route)/Signoff
• Block coordinator role for more than 5~10 blocks, solving the critical issue and give the solution to block owners.
• TOP role for the complicated hierarchical chip (more than 20 Million instances plus 500+ macros), doing floorplan and partition, responsible for full chip tapeout

Requirements:

• Bachelor/Master Degree in Electrical/Computer Engineer.
• Experience in physical design with tape-outs.
• Knowledge of complete Netlist-to-GDS flow, Synopsys/Cadence tools like ICC2 or Innovus.
• Good in script programming with Perl, TCL/TK or other languages.

On behalf of our client who is an Original Equipment Manufacturer (OEM) in the Building Equipment space, we are looking for Mechanical Design Engineers.

Responsibilities

• Provides technical support to projects, Installation on problem verification, report, and coordinates with Group on job site issues and technical solutions related to mechanical design.
• Involving in design interfacing and parts provision among Group of companies.
• Participate in the resolution of design problems related to Error/Trouble investigation, and formulate corrective & preventive measures.
• Provide engineering support to Marketing and Sales staff for new products.
• Provide Maintenance Works Inquiry/Spare Parts Inquiry/Order Supports.
• Any other ad-hoc matters assigned by the Manager

Requirements

• Degree in Mechanical Engineering or diploma with a minimum of 5 years of related experience.
• Proficient in Auto CAD & 3D software is essential

Salary will be offered in accordance with experience and qualification.

Location: East

EA License No. : 22C0971 | EA Reg ID : R21101298

Tanglin Mission

Tanglin Trust School Singapore has a long tradition of providing British-based learning with an international perspective. At Tanglin we strive to make every individual feel valued, happy and successful. Responsibility, enthusiasm and participation are actively encouraged and integrity is prized. Working together in a safe, caring yet stimulating environment, we set high expectations whilst offering strong support, resulting in a community of lifelong learners who can contribute with confidence to our world.

Our Vision

We aspire to be the best school in the world with a dynamic learning community which nurtures and inspires every individual to be the best they can be. Our core values of Respect, Responsibility and Purpose are at the heart of everything we do across the school.

The Role

This is a rare and exciting opportunity to join a DT department within a well-established, outstanding school. Our vision is that the department will be modern and forward-thinking, with learning located in authentic contexts, and that the curriculum will reflect the successful candidate’s creative energy. He/she will have outstanding subject knowledge, a passion for designing and will be at the cutting edge of technological innovation within the field. The successful candidate will be a teacher with commitment, integrity and excellent communication skills and a teacher with flexibility, resilience and a caring approach towards students.

Key Responsibilities

1. Learning & Teaching

• Manage an effective, enthusiastic, and safe learning environment.
• Deliver the curriculum to assigned classes in accordance with the timetable.
• Differentiate lessons according to the abilities and learning needs of individual students.
• Promote independent learning by adopting teaching and learning strategies that develop the competence and confidence of every student.
• Seek to develop students’ attributes through the Tanglin Learner Profile, as well as seek opportunities to develop their own attributes through that framework.
• Ensure the thorough implementation of subject specifications, teaching schemes, assessment policies and reporting procedures.
• Create opportunities for students to develop confidence in the subject through carefully planned and managed activities.
• Support a departmental and whole school culture of innovation that includes varied and exciting teaching approaches, technological integration, and thoughtful evaluation.
• Possess the flexibility required to teach a range of materials, topics, and ability levels.
• Possess the flexibility required to teach either pathway (A level or IB) in the Sixth form.

2. Planning & Development

• Take responsibility for at least one aspect of D&T curriculum development each year following discussion and negotiation with the department leadership team (eg, creating a new scheme of work, drafting of departmental policy, organisation of trip).
• Assist the D&T department leadership team in evaluating and developing the new curriculum.
• Take advantage of opportunities for professional development offered by Tanglin.
• Take responsibility for their professional development and that of colleagues by occasionally leading departmental inset or department meetings in an area of expertise.
• Assist the HOD (Head of Department) in identifying areas for development in D&T within the broader aims of the school development plan.
• Collaborate with colleagues in the planning and delivery of schemes of work, including the choice of appropriate teaching and learning methods to meet the needs of the subject and of different pupils.
• Assist the HOD in adapting curriculum content and methods of teaching and examining as appropriate.
• Support a school culture of innovation that includes technological integration.
• Be supportive of and open to the frequent change that characterises a school such as Tanglin.

3. Management of Resources and the Teaching Environment:

• Assist the HOD in identifying appropriate resources within the limits of the departmental budget.
• Assist the HOD in ensuring that departmental rooms present stimulating environments that help to influence pupils’ attitudes positively towards D&T.

4. Assessment, Recording & Reporting

• Ensure students’ work is regularly assessed according to D&T departmental policy and that homework is in line with school policy.
• Report to parents in accordance with the school’s reporting policy as laid down in the Staff Handbook.
• To use information gained from assessment, recording and reporting procedures to generate further improvement in pupil achievement.
• Assist the HOD in the setting and marking of school examinations and to supervise entries for external examinations.

5. Pastoral and Co-Curricular

• Lead the development of the F1 in Schools program in D&T.
• Contribute to co-curricular activities that broaden pupils’ experiences and contribute to the general life of the school.
• When required, take on a form tutor role in the Senior School and fulfil the responsibilities of that position.
• Follow the School’s policies and procedures regarding discipline and behaviour, daily routines, duties, homework, leave of absence, and visits, as laid down in the Staff Handbook.
• Be responsible for reporting any concerns about a child to the Designated Safeguarding Lead.

6. Communication and Liaison

• Help to establish an ability to spot and solve problems and to increase resilience in learning, through your own enthusiasm for the subject.
• Contribute wholeheartedly to D&T department activities such as supporting each school with projects, planning ‘House Day’ activities, ‘Children’s University’ and transition days.
• Attend and contribute to meetings of a professional nature with HOD, HOF, HOY, SSLT and in other circumstances when requested.
• Liaise with the HOD and HOF in respect of pupil records, rewards, and sanctions.
• Maintain appropriate links with teaching colleagues in all sections of the school and foster cross-curricular links where appropriate.
• Liaise with members of the Learning Support Team regarding individual students who may have exceptional needs, to ensure that those needs are understood, planned for and met.
• Liaise with pastoral staff, including form tutors, Heads of Year, the Assistant Heads of School and the Head of Careers on matters pertaining to the study of D&T.
• Contribute to the strengthening of the parent-teacher partnership in individual and whole school initiatives as and when required.
• Assist the HOD in developing effective links with the wider community to extend the study of D&T and enhance teaching and learning.

Requirements :

1) A Degree in Civil or Structural Engineering from a recognized university or its equivalent recognized by the Professional Engineer Board, Singapore. A diploma holder with design experience will also be considered.

2) Minimum 2 years of design experience in Building projects and/or Earth Retaining Structures.

3) Conversant with local codes and authority submission procedures.

4) Competent in common engineering design software, analytical tools and BIM software.

5) Familiar with precast concrete, post-tensioned concrete and steelwork design, knowledge of MET design will be an advantage.

6) Proactive, responsible and keen to work in a team.

7) Excellent interpersonal, good verbal and written communication skills.

Job Description :

1) Perform Civil/Structural engineering design and analysis.

2) Participate in the BIM process. Involvement in the collaboration with peers and fellow Consultants from other disciplines.

3) Coordinate, monitor and track authority submissions for Projects.

4) Conduct feasibility studies, and inspections and prepare technical reports.

5) Attend meetings and design workshops, when necessary.

6) Liaise with Engineers and/or Consultant teams during the implementation of projects.

Responsibilities:

• Conduct Solution Architecture activities when required on Bids and Projects, in close collaboration with Systems Engineers and reporting to the PDA in that case. In charge of proposing Solution Compliance.
• Support the Solution Orientation Review (SOR) for Bids in collaboration with the Solution Engineering Manager (Bids), Services Engineering and assigned bid team members.
• Propose draft DVa and report to the PDA in terms of Solution definition for allocated Bids/Projects.
• Ensure that the design of the Solution satisfies:
  • Customer needs and contractual requirements for a project,
  • Contractually applicable technical standards,
  • Alignment with the Product Policy,
  • Cost effectiveness, and
  • Applicable design legislation, rules and regulations.
• Ensures, with the support of Specialty Engineering experts & HSE stakeholders that:
  • Solution design takes into account contract requirements in terms of Safety, Security and Human Factors and applicable legislation, rules & regulations, including Environmental/HSE requirements & standards,
  • Related certification activities are performed correctly.
• Particular focus on risks qualification and quantification and mitigation actions at Bid phase and follow-up at Project phase. Risks must be understood and mastered.
• Participate in specific actions plans and dedicated task forces as allocated to solve complex technical problems.
• Contribute to elaborate the TopSKY-ATC product policy through commonalising specific Solutions required by projects and support the HE Product Design Authority in maintaining a rigorous Product policy.
• Take charge of a Technical Speciality when required (e.g. Network & Infrastructure) with the aim to:
  • be the subject-matter expert within the organization,
  • provides a conduit for the sharing of state-of-the-art knowledge across the discipline,
  • be responsible for capitalisation within his/her discipline.
• Pro-actively share knowledge with the experts network inside the AMS Business Line and participate when required into external events in the technical & ATM expert fields to represent Thales AMS.

Requirement:

• Tertiary Qualifications in Engineering
• Degree in computer sciences (minimum Bachelor of Sciences) and network discipline
• 7 years minimum of experience holding positions in systems engineering and/or software engineering and/or integration on complex software-centric real-time systems.
• A proven track-record in supporting the design of Solutions for complex System Of Systems.
• Proven capability to work in a multi-cultural environment and with variety of international customers.
• Experience in the ATM Domain is mandatory.
• Language: fluent English, French would be a plus.
• International work context
• Aptitude to work effectively as part of a team.
• Resilience under pressure.
• Capacity to learn quickly.
• Capability to manage various stakeholders having different objectives.

Project Overview

This project aims to develop a real-time blood analysis and diagnostic platform using an integrated microfluidic chip. This platform uses precision microfluidic technology to process and profile the biological activity of white blood cells which is related to a host of inflammatory conditions ranging from diabetes, sepsis to leukemia. The platform developed will enable point-of-care diagnosis of diseases and this project will accelerate the platform from bench to bedside through the development, deployment and testing of clinical samples.

This Engineering position offers a rare opportunity to bridge the gap between laboratory discovery of new technologies and real-world implementation of clinical deployment and testing.

Responsibilities

The engineer is responsible for the design, prototype, manufacturing and testing of the medical device. This involves the use of with computer-aided design prototyping, setting specifications and assembly of mechnical/electrical components, testing and deployment of device for field testing.

Responsibilties include:

- To work closely with a team of clinical, mechanical/software engineers and data scientist for the medical device design and prototyping. Gather feedbacks on prototype designs by end-users.

- To Validate designs by analysing data gathered from component or system level testing. Use benchmarking techniques to characterise component and device performance.

- To ensure proper documentation of design history files and standardization of data storage for reports, presentations, technical and administrative documents.

- To source for vendors and components to ensure manufacturability and cost of medical device.

- To support the team for maintenance of equipment, inventory and purchases.

Requirements

- Bachelors/Masters or Ph.D. in Mechanical, Electrical, Biomedical Engineering, or a relevant field with experience developing and supporting embedded systems.

- Minimum Bachelor's or Master's degree with 2+ years of work experience or Ph.D. with 0+ years of experience.

- Rapid prototyping experience in areas such as 3D printing, laser cutting, CNC, injection molding, microcontroller/microprocessor programming and relevant skills in embedded system.

- Prefered experience in commercial manufacturing, R&D project management and hardware testing/certification.

- Excellent debugging skills and strong ability to root cause, isolate and solve software/hardware system issues.

- Fluent in C++, Python (3.X) and relavent coding languages for software-hardware integration.

- A desire to deliver a quality and innovative medical diagnostic product that improves many people’s lives.

- Good communication and managing skills are important to work with colleagues efficiently in addition to creativity to solve problems and find improvements on products and processes already in place.

- Required experience and knowlegde to read/write scientific publications, patent search, schematics and data sheets for hardware components.

- Able and commited to work in Singapore. Willing to commute and meet regularly with vendors and collaborators at NUS, NUH, and partnering hospitals.

- Strong documentation and writing skills

- A desire to deliver a quality and innovative medical diagnostic product that improves many people’s lives.

Relevant Skills

2D/3D Computer Aided Designs, C++, Python, Operating CNC/3D printers, basic use of machine tools, Github

To apply, please visit our website at: https://portal.smart.mit.edu/careers/career-opportunities

Interested applicants are invited to send in their full CV/resume, cover letter and list of three references (to include reference names and contact information). We regret that only shortlisted candidates will be notified.

Be part of a team in creating state-of-the-art Secure Low Power SoC ARM-based SoC/MCU for the Low-End , Mid and High-End performance MCU product line in a IC Design Environment.

Responsible:

• Engage design team and architects to strategies DFT Test plan for SoC top level
• Create DFT test modes, scan architecture, clocking and reset architecture.
• Plan Pin-Muxing and Pad and Boundary scan (BSDL) generation
• Execute JTAG TAP network generation and verification.
• Quality check with Spyglass analysis for scan using spyglass tool
• Execute Scan insertion using DC / Tessent tools
• Deploy Scan constraints development for Atspeed, shift and slow capture mode.
• Generate ATPG pattern generation using synopsys Tetramax tools
• Analyze and report on test coverage metrics to ensure comprehensive testing of designs.
• Implement improvements to enhance test coverage and efficiency.
• Verify No-timing and SDF simulation of ATPG patterns using VCS and NCSim tools
• Implement MBIST MBIST repair and verification using Mentor Graphic Tessent tools.
• Boundary scan verification
• Generate STIL test patterns for tester
• Silicon bring-up and failure debug

Requirements:

• Requires BSc/MSc or PhD in electrical and electronic or Computer engineering
• Requires > 5 years or more of experience in DFT at IP and SoC top level. Proficient at using DC ,tetramax and MG tessent DFT tools
• Tape-out at least 5 chips and tested to pass on tester.
• Requires strong understanding of state of the DFT methodology , flat and hierarchical implement of DFT from IP to SoC top.
• Capable of understanding UPF to enable multiple power domain verification
• Capable of leading, review and guiding younger DFT engineers in their daily tasks
• Able to work in a team with a strong drive to excel
• Able to work independently on a given assignment and work hard to finish on time
• Good written and communication skills

We are looking for a candidate for high-speed analog integrated circuit design. This candidate will contribute to the development of high linearity silicon photonics modulators for 6G and beyond communication systems. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications
• Design and tapeout ICs which include state-of-the-art circuit blocks, e.g. wideband linear low-noise amplifier and transimpedance amplifier with a focus on circuits interfacing with silicon photonics elements
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electronic Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog IC design methodologies and successful tapeout experience
• Familiar with analog IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

Job Description:

We are looking for a highly motivated computational scientist with a deep understanding of chemistry/cheminformatics and structural biology to develop new AI models for ligand discovery. You will be working on a large collaborative project to build up A*STAR’s computational drug discovery capabilities. The candidate is expected to be familiar with the latest generative models. Familiarity with molecular docking programs is a plus.

Job Requirements:

• PhD degree in life sciences, chemistry, computational biology, or a related discipline
• Passion for science and research
• Highly motivated
• Proficiency in the use of machine learning frameworks (e.g. PyTorch, TensorFlow)
• Experienced in developing generative models
• Strong knowledge of chemistry/cheminformatics and structural biology
• Able to work independently and as part of a team
• Excellent written and oral communication skills

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

The position is an exciting opportunity to be part of a flexible and dynamic team in the growing markets of mixed signal chips with signal processing IPs, ARM processor and AMBA bus interface like Wireless Chargers, Bluetooth, PMIC etc. used in Mobile, Tablets, Microcontrollers etc. The role works within the digital design team with the aim to create an efficient Digital Design.

Responsibilities and Duties include but not limited to:

• Work at IP level design, but occasionally also at SOC design.
• Creation of RTL code
• Some opportunities to integrate the IP in the SOC
• UPF flow, Low power Flow, Power aware simulations
• CDC/RDC/LINT checks using various tools
• Verification of concept using Matlab/Simulink and toolboxes
• Synthesis, Scan insertion, ATPG.
• STA.
• Schedule preparation at IP level together with the Design leader and execution adhere to plan.
• Reporting to the management.
• Accountability.

Qualification Requirements:

• Masters in Electronics' Engineering (a relevant experience with minimum 2 years in a semiconductor or high technology R&D environment would be appreciated)
• Some Knowledge/Experience/Exposure as below would be appreciated:

1. ARM based Architectures, AMBA bus, Peripherals, Boot
2. RISC-V architectures
3. Hardware Design Language (such as VHDL or Verilog)
4. CDC, RDC, LINT
5. Synthesis, Scan Insertion, ATPG
6. Physical Design, including Power analysis, Clock tree Synthesis, Power Gating, Physical Checks
7. Power Aware, Low power and UPF methodology
8. Tools porting from Verilog RTL into C++
9. Scripting languages (PERL, TCL, PYTHON)
10. Knowledge in Static Timing Analysis

• Able to work in a multi-cultural team.
• Strong analytical and problem-solving skill.
• Able to keep up with fast moving new design methodology.
• Candidates with extensive experiences will be considered as Staff Engineers/Design Managers
• Salary package will be offered base on working experience

The School of Media, Arts & Design in Singapore Polytechnic is looking to hire a Temporary Video Design Assistant.

Responsibilities:

• Editing simple videos for social media and promotional content, creating posters for events and campaigns, and engaging with students to enhance participation and feedback.
• Fostering student engagement through communication on various platforms, organizing activities, and soliciting input for improvement.

Requirements:

• Proficient in video editing software (Adobe Premiere Pro), graphic design tools (e.g., Canva/Illustrator)
• Able to work independently
• Possess good communication and interpersonal skills

Working Hours:

Mon - Thur 8.30am-6.00pm

Fri 8.30am-5.30pm

Contract Duration:

11 months starting from May 2024

We are looking for a self-motivated candidate with expertise in high performance digital design, DSP and mixed signal modeling join our cryogenic CMOS-based quantum control project. This candidate will work closely with our digital and analog design team as well as with the local physics and material designers to develop low-power, high fidelity and highly scalable control and read-out SoC for superconducting qubit-based quantum computing applications.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to co-optimization between on-chip memory and DSP design and analog front-end (i.e. DAC, BPF, Mixer, LNA and ADC) to ensure high quantum control/readout as well as to optimize power consumption per channel

o Emphasize system-level perspective in the design process, considering overall system architecture and functionality

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments

o RTL implementation for custom circuit design using Verilog/SystemVerilog with focus on DDS, Filter and Error Correction Code

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of mixed signal designs to validate quantum control fidelity and digital-analog interface throughput

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure

• Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II
• Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture
• Prepare detailed design documentation, including specifications, test plans, and reports
• Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues
• Bring creative and innovative solutions to design challenges. Stay abreast of industry trends and emerging technologies
• Test and verify fabricated chip using FPGA and other lab equipment such as logic analyzer and oscilloscope

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a candidate for high-speed analog and mixed-signal integrated circuit design. This candidate will contribute to the development of high-speed silicon photonics transceiver for next generation wireline communication system. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications.
• Design and tapeout ICs which include state-of-the-art circuit blocks e.g. analog-to-digital converter, equalizers (CTLE, DFE) as part of the high-speed data link system.
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electrical Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog and mixed-signal IC design methodologies and successful tapeout experience
• Familiar with analog and mixed-signal IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven

We are looking for a self-motivated candidate with expertise in high performance digital design, DSP and mixed signal modeling join our cryogenic CMOS-based quantum control project. This candidate will work closely with our digital and analog design team as well as with the local physics and material designers to develop low-power, high fidelity and highly scalable control and read-out SoC for superconducting qubit-based quantum computing applications.

Job Description:

· Digital IC Design and system-level exploration:

o Lead and contribute to co-optimization between on-chip memory and DSP design and analog front-end (i.e. DAC, BPF, Mixer, LNA and ADC) to ensure high quantum control/readout as well as to optimize power consumption per channel

o Emphasize system-level perspective in the design process, considering overall system architecture and functionality

o Apply a deep understanding of cryogenic temperature effects on digital ICs and implement design strategies for optimal performance in low-temperature environments

o RTL implementation for custom circuit design using Verilog/SystemVerilog with focus on DDS, Filter and Error Correction Code

· Simulation, Verification, and Implementation:

o Conduct thorough simulation and verification of mixed signal designs to validate quantum control fidelity and digital-analog interface throughput

o Utilize FPGA in digital IC designs, leveraging its flexibility and reconfigurability for system emulation and architecture exploration

o Perform timing analysis and collaborate with the team to optimize designs for timing closure

• Publish research works in prestigious conferences and Journals such as ISSCC, VLSI Symp, A-SSCC, DAC, JSSC and TCAS-I/II
• Collaborate closely with cross-functional teams, including hardware and software engineers, to seamlessly integrate digital ICs into the overall system architecture
• Prepare detailed design documentation, including specifications, test plans, and reports
• Troubleshoot and debug digital IC designs with a focus on identifying and addressing system-level issues
• Bring creative and innovative solutions to design challenges. Stay abreast of industry trends and emerging technologies
• Test and verify fabricated chip using FPGA and other lab equipment such as logic analyzer and oscilloscope

Requirements: Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field. The candidate should have prior experiences in IC tape-out of digital/mixed signal SoC and system level modelling and optimization using industry standard tools from leading EDA vendors such as Cadence, Synopsis and Matlab.

We are looking for a candidate for high-speed analog and mixed-signal integrated circuit design. This candidate will contribute to the development of high-speed silicon photonics transceiver for next generation wireline communication system. This requires the candidate to work closely with the optics team on the electro/optical co-design as well as system integration and validation.

• Perform system level analysis and design, to derive circuit-level design specifications.
• Design and tapeout ICs which include state-of-the-art circuit blocks e.g. analog-to-digital converter, equalizers (CTLE, DFE) as part of the high-speed data link system.
• Work together with team to investigate novel circuit/system solutions to create new inventions

Job Requirements

• Qualification & Field of Study: Minimum Bachelor’s degree and above in Electrical Engineering
• Min. Years of Experience: Minimum 2-years of transistor level analog circuit design experience

Other Requirements (e.g. Skills, Competencies)

• Good understanding of CMOS analog and mixed-signal IC design methodologies and successful tapeout experience
• Familiar with analog and mixed-signal IC design and verification flow
• Industry experience would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Good communication skills (both written and spoken)
• Able to generate high quality scientific publications and patents
• Team player, quick learner and self-driven